ISP1181A Ver la hoja de datos (PDF) - Philips Electronics
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ISP1181A Datasheet PDF : 70 Pages
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Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Table 5: Programmable FIFO size
FFOSZ[3:0]
Non-isochronous
0000
8 bytes
0001
16 bytes
0010
32 bytes
0011
64 bytes
0100
reserved
0101
reserved
0110
reserved
0111
reserved
1000
reserved
1001
reserved
1010
reserved
1011
reserved
1100
reserved
1101
reserved
1110
reserved
1111
reserved
Isochronous
16 bytes
32 bytes
48 bytes
64 bytes
96 bytes
128 bytes
160 bytes
192 bytes
256 bytes
320 bytes
384 bytes
512 bytes
640 bytes
768 bytes
896 bytes
1023 bytes
Each programmable FIFO can be configured independently via its ECR, but the total
physical size of all enabled endpoints (IN plus OUT) must not exceed 2462 bytes.
Table 6 shows an example of a configuration fitting in the maximum available space of
2462 bytes. The total number of logical bytes in the example is 1311. The physical
storage capacity used for double buffering is managed by the peripheral hardware
and is transparent to the user.
Table 6: Memory configuration example
Physical size
(bytes)
Logical size
(bytes)
Endpoint description
64
64
control IN (64 byte fixed)
64
64
control OUT (64 byte fixed)
2046
1023
double-buffered 1023-byte isochronous endpoint
16
16
16-byte interrupt OUT
16
16
16-byte interrupt IN
128
64
double-buffered 64-byte bulk OUT
128
64
double-buffered 64-byte bulk IN
9397 750 13959
Product data
Rev. 05 — 08 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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