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ISP1181A Datasheet PDF : 70 Pages
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Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
In DACK-only mode the ISP1181A uses the DACK signal as data strobe. Input
signals RD and WR are ignored. This mode is used in CPU systems that have a
single address space for memory and I/O access. Such systems have no separate
MEMW and MEMR signals: the RD and WR signals are also used as memory data
strobes.
ISP1181A
DREQ
DACK
AD0,
DATA1 to DATA15
RAM
DMA
CONTROLLER
DREQ
DACK
RD
WR
HRQ
HLDA
Fig 5. ISP1181A in DACK-only DMA mode.
CPU
HRQ
HLDA
004aaa023
10.4 End-Of-Transfer conditions
10.4.1 Bulk endpoints
A DMA transfer to/from a bulk endpoint can be terminated by any of the following
conditions (bit names refer to the DMA Configuration Register, see Table 24):
• An external End-Of-Transfer signal occurs on input EOT
• The DMA transfer completes as programmed in the DMA Counter register
(CNTREN = 1)
• A short packet is received on an enabled OUT endpoint (SHORTP = 1)
• DMA operation is disabled by clearing bit DMAEN.
External EOT: When reading from an OUT endpoint, an external EOT will stop the
DMA operation and clear any remaining data in the current FIFO. For a double-
buffered endpoint the other (inactive) buffer is not affected.
When writing to an IN endpoint, an EOT will stop the DMA operation and the data
packet in the FIFO (even if it is smaller than the maximum packet size) will be sent to
the USB host at the next IN token.
DMA Counter Register: An EOT from the DMA Counter Register is enabled by
setting bit CNTREN in the DMA Configuration Register. The ISP1181A has a 16-bit
DMA Counter Register, which specifies the number of bytes to be transferred. When
DMA is enabled (DMAEN = 1), the internal DMA counter is loaded with the value from
the DMA Counter Register. When the internal counter completes the transfer as
programmed in the DMA counter, an EOT condition is generated and the DMA
operation stops.
9397 750 13959
Product data
Rev. 05 — 08 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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