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LPC47M172 Datasheet PDF : 226 Pages
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Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
7.25.15 Memory Configurations .................................................................................................................117
7.25.16 Register Definitions .......................................................................................................................117
7.25.17 External Clock Signal ....................................................................................................................118
7.25.18 Default Reset Conditions ...............................................................................................................118
7.25.19 GateA20 and Keyboard Reset.......................................................................................................118
7.26 Port 92 Fast Gatea20 and Keyboard Reset..........................................................................................118
7.26.1 Port 92 Register.............................................................................................................................118
7.26.2 Keyboard and Mouse PME Generation .........................................................................................122
7.27 General Purpose I/O.............................................................................................................................123
7.27.1 GPIO Pins .....................................................................................................................................124
7.27.2 Description.....................................................................................................................................124
7.27.3 GPIO Control .................................................................................................................................125
7.27.4 GPIO Operation.............................................................................................................................126
7.27.5 GPIO PME Functionality................................................................................................................127
7.27.6 Either Edge Triggered Interrupts ...................................................................................................127
7.28 PME Support ........................................................................................................................................127
7.28.1 ‘Wake on Specific Key’ Option.......................................................................................................128
7.29 Fan Monitoring......................................................................................................................................129
7.29.1 Fan Tachometer Inputs .................................................................................................................130
7.29.2 Detection of a Stalled Fan .............................................................................................................130
7.30 Hard Drive and Power LED Logic .........................................................................................................131
7.30.1 Hard Drive Front Panel LED (Red) ................................................................................................131
7.30.2 Yellow and Green Power LED Pins ...............................................................................................132
7.31 Power Generation (5V) .........................................................................................................................133
7.31.1 Reference Pins ..............................................................................................................................133
7.31.2 5V Main Reference Generation .....................................................................................................134
7.31.3 5V Standby Reference Generation................................................................................................134
7.31.4 Reference Timings ........................................................................................................................135
7.32 IDE Reset Output Pin ...........................................................................................................................135
7.33 PCI Reset Output Pins..........................................................................................................................135
7.34 Voltage Translation Circuit....................................................................................................................136
7.35 SMBus Isolation Circuitry......................................................................................................................138
7.36 PS_ON Logic ........................................................................................................................................140
7.37 PWRGD_3V Logic ................................................................................................................................140
7.38 SCK_BJT_GATE Output ......................................................................................................................142
7.39 Backfeed Cut and Latched Backfeed Cut Circuitry ...............................................................................143
7.40 Resume Reset Logic ............................................................................................................................148
7.41 CNR Logic ............................................................................................................................................148
Chapter 8 Power Control Runtime Registers...................................................................................... 150
Chapter 9 GPIO Runtime Registers.................................................................................................... 157
Chapter 10 Runtime Register Block Runtime Registers ....................................................................... 161
Chapter 11 Configuration ...................................................................................................................... 172
11.1 System Elements..................................................................................................................................172
11.1.1 Primary Configuration Address Decoder .......................................................................................172
11.1.2 Entering the Configuration State....................................................................................................172
11.1.3 Exiting the Configuration State ......................................................................................................172
11.1.4 Configuration Sequence ................................................................................................................173
11.1.5 Enter Configuration Mode..............................................................................................................173
11.1.6 Configuration Mode .......................................................................................................................173
11.1.7 Exit Configuration Mode ................................................................................................................173
11.1.8 Programming Example ..................................................................................................................174
11.2 Chip Level (Global) Control/Configuration Registers[0x00-0x2F] .........................................................179
11.3 Logical Device Configuration/Control Registers [0x30-0xFF] ...............................................................182
11.4 Logical Device I/O Address ..................................................................................................................186
11.5 Logical Device Configuration Registers ................................................................................................189
Chapter 12 Electrical Characteristics .................................................................................................... 195
12.1 Maximum Guaranteed Ratings .............................................................................................................195
12.2 Operational DC Characteristics ............................................................................................................195
12.3 Standby Power Requirements ..............................................................................................................200
12.4 Capacitance Values for Pins.................................................................................................................201
SMSC/Non-SMSC Register Sets (Rev. 01-11-07)
Page 6
DATASHEET
SMSC LPC47M172
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