LXT332 Ver la hoja de datos (PDF) - Level One

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LXT332

Dual T1/E1 Line Interface Unit with Crystal-less Attenuation

Level One 

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TVCC1 AI + 5 volt power supply input for the port 1 transmit driver. TVCC1 must

not vary from TVCC0 or VCC by more than ± 0.3 V.

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TGND1 – Ground. Ground return for power supply TVCC1.

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VCC

AI +5 VDC power supply input for all circuits, except the transmit drivers.

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JASEL DI Jitter Attenuation Select. Selects jitter attenuation for both ports. When

JASEL = 1, JA circuits are placed in the receive paths. When JASEL = 0, JA

circuits are placed in the transmit paths. When JASEL is clocked with

MCLK, the JA circuit is disabled.

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VCQ1 DI/O Violation insert, Clock, or QRSS. Function (Violation insert, Clock, or

QRSS) is determined by the VCQE pin. Provides Violation Insertion, High

Frequency Clock or QRSS Generation functions for Port 1. Refer to VCQ0

signal description for details.

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SPE

DI Serial Port Enable. SPE must be clocked with MCLK to enable Host Mode

control through the serial port.

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VCQE DI Violation - Clock - QRSS Enable. When set High, enables the Bipolar

Violation Insert functions of VCQ0 and VCQ1 pins. When set Low, enables

the High Frequency Clock functions of VCQ0 and VCQ1. When clocked

with MCLK, enables the QRSS functions of VCQ0 and VCQ1, and enables

the QRSS Generate and Detect function of PD0 and PD1 pins.

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SDO

DO Serial Data Output. If CLKE is High, SDO is valid on the rising edge of

SCLK. If CLKE is Low, SDO is valid on the falling edge of SCLK.

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RCLK1 DO Receive Clock - Port 1. This clock is recovered from the input signal.

Under Loss of Signal (LOS) conditions, this output is derived from MCLK.

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RPOS1 DO Receive Positive and Negative Data - Port 1. In the Bipolar I/O mode,

(Bipolar)

these pins are the data outputs from port 1. A signal on RPOS corresponds to

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RNEG1

receipt of a positive pulse on RTIP/RRING. A signal on RNEG corresponds

DO to receipt of a negative pulse on RTIP/RRING. RNEG/RPOS outputs are

(Bipolar)

Non-Return-to-Zero (NRZ). CLKE determines the clock edge at which

these outputs are stable and valid.

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TNEG1 DI Transmit Positive and Negative Data - Port 1. In the Bipolar I/O mode,

(Bipolar)

these pins are TPOS and TNEG, the positive and negative sides of a bipolar

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TPOS1

input pair for port 1. Data to be transmitted onto the twisted-pair line is input

DI at these pins. However, when TRSTE is clocked by MCLK, the LXT332

(Bipolar)

switches to a unipolar mode. Unipolar mode pin functions are described sep-

arately.

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TCLK1 DI Transmit Clock - Port 1. 1.544 MHz for T1, 2.048 MHz for E1. The trans-

mit data inputs are sampled on the falling edge of TCLK.

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TDATA0 DI Transmit Data - Port 0. In the Unipolar mode, the data to be transmitted

onto the twisted-pair line from port 0 is input at this pin.

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