MB86613S Ver la hoja de datos (PDF) - Fujitsu

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MB86613S

IEEE1394 Open HCI Controller

Fujitsu 

Preliminary

2.4.2. Filter Circuit

Figure 2.3 and 2.4 shows an example of connection diagram on PLL filter circuit. A circuit where the 390W and

a 3300pF are connected is required between the FIL pin and GND. RF pin is connected with GND through a

5.1KW resister. The CLK pin requires a 24.576MHz of clock module operating at +3.3V. Pin39 must be open

when using a external clock module. When using the crystal oscillator, connect it and capacitors as Figure 2.4.

Those resistor and capacitor are reference values and does not guarantee stable operation on your applica-

tion system.

FIL

390W

3300pF

RF

5.1kW

CLK

24.576MHz

Fig. 2.3 PLL Filter Connection Example A

10

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