MT9041 Ver la hoja de datos (PDF) - Mitel Networks

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MT9041

Multiple Output Trunk PLL

Mitel Networks 

Advance Information

MT9041

Pin Description (continued)

Pin #

17

18

19

20

21, 22

23

24, 25

26

27

28

Name

Description

C16 Clock 16.384 MHz (CMOS compatible). This output is a 16.384 MHz output clock locked

to the reference input signal.

VDD Positive Supply Voltage. Nominally +5 volts.

IC0 Internal Connection 0. Connect to VSS.

IC1 Internal Connection 1. Leave open circuit.

IC0 Internal Connection 0. Connect to VSS.

MS Mode Select Input (TTL compatible). This input selects the PLL mode of operation (i.e. ,

NORMAL or FREERUN, see Table 1).

IC0

FSEL2

FSEL1

Internal Connection 0. Connect to VSS.

Frequency Select - 2 Input (TTL compatible). This input, in conjunction with FSEL1,

selects the frequency of the input reference source (i.e., 8 kHz, 1.544 MHz, or 2.048 MHz;

see Table 3).

Frequency Select - 1 Input (TTL compatible). This input, in conjunction with FSEL2,

selects the frequency of the input reference source (i.e., 8 kHz, 1.544 MHz, or 2.048 MHz;

see Table 3).

RST

Reset (TTL compatible). This input (active LOW) puts the MT9041 in its reset state. To

guarantee proper operation, the device must be reset after power-up. The time constant for

a power-up reset circuit must be a minimum of five times the rise time of the power supply. In

normal operation, the RST pin must be held low for a minimum of 60 nsec to reset the

device.

3-85

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