MX98715 Ver la hoja de datos (PDF) - Macronix International

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MX98715

SINGLE CHIP FAST ETHERNET NIC CONTROLLER - CRYSTAL VERSION

Macronix International 

MX98715AEC-C

5.2 HOST INTERFACE REGISTERS

MX98715AEC-C CSRs are located in the host I/O or memory address space.The CSRs are double word aligned and

32 bits long. Definitions and address for all CSRs are as follows :

CSR Mapping

Register

CSR0

CSR1

CSR2

CSR3

CSR4

CSR5

CSR6

CSR7

CSR8

CSR9

CSR10

CSR11

CSR12

CSR13

CSR14

CSR15

CSR20

CSR21

CSR22

CSR23

CSR24

CSR25

CSR26

CSR27

CSR28

CRS29

CSR30

CSR31

Meaning

Bus mode

Transmit poll demand

Receive poll demand

Receive list demand

Transmit list base address

Interrupt status

Operation mode

Interrupt enable

Missed frame counter

Serial ROM and MII management

Reserved

General Purpose timer

10 Base-T status port

SIA Reset Register

10 Base-T control port

Watchdog timer

Auto compensation

Flow control Register

MAC ID Byte 3-0

Magic ID 5, 4 / MAC ID Byte 5, 4

Magic ID Byte 3-0

Filter 0 Byte Mask

Filter 1 Byte Mask

Filter 2 Byte Mask

Filter 3 Byte mask

Filter Offset

Filter 1&0 CRC-16

Filter 3&2 CRC-16

Offset from CSR Base

Address ( PBIO and PBMA )

00

08h

10h

18h

20h

28h

30h

38h

40h

48h

50h

58h

60h

68h

70h

78h

A0h

A8h

B0h

B8h

C0h

C8h

D0h

D8h

E0h

E8h

F0h

F8h

P/N:PM0655

REV. 0.3, MAY. 04, 2000

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