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PCA9558

8-bit I2C-bus and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C-bus EEPROM DIP switch and 2-kbit EEPROM

NXP Semiconductors. 

NXP Semiconductors

PCA9558

8-bit I2C-bus/SMBus I/O port

Table 3. Command byte

D7 D6 D5 D4 D3 D2 D1 D0 Command

0 0 0 0 0 0 0 1 write to 256-byte EEPROM via I2C-bus

0 0 0 0 0 0 1 1 read from 256-byte EEPROM via I2C-bus

0 0 0 0 0 1 0 0 write to 6-bit EEPROM via I2C-bus

0 0 0 0 0 1 1 0 read from 6-bit EEPROM via I2C-bus

0 0 0 0 0 1 1 1 read Input Port (IP) register via I2C-bus

0 0 0 0 1 0 0 0 read/write Output Port (OP) register via I2C-bus

0 0 0 0 1 0 0 1 read/write Polarity Inversion (PI) register via

I2C-bus

0 0 0 0 1 0 1 0 read/write Input/Output Configuration (IOC)

register via I2C-bus

0 0 0 0 1 0 1 1 read/write MUX Control (MUXCNTRL) register

via I2C-bus

0 0 0 0 1 1 0 0 read MUX_INx values via I2C-bus

0 0 0 0 1 1 0 1 reserved

0 0 0 0 1 1 1 0 reserved

0 0 0 0 1 1 1 1 read 256-byte EEPROM and write OP register

0 0 0 1 0 0 0 0 read 256-byte EEPROM and write PI register

0 0 0 1 0 0 0 1 read 256-byte EEPROM and write IOC register

0 0 0 1 0 0 1 0 read IP register and write to 256-byte EEPROM

0 0 0 1 0 0 1 1 reserved

::::::::

1 1 1 1 1 1 1 1 reserved

7.1.1 Multiplexer

MSB

0

LSB

0

NON-

MUXED

DATA

MUX

DATA E

MUX

DATA D

MUX

DATA C

MUX

DATA B

MUX

DATA A

002aad369

Fig 5. I2C-bus MUX_OUTx data byte

MSB

0

0

LSB

0

MUX_IN MUX_IN MUX_IN MUX_IN MUX_IN

E

D

C

B

A

002aad370

Fig 6. I2C-bus MUX_INx data byte

PCA9558_4

Product data sheet

Rev. 04 — 14 April 2009

© NXP B.V. 2009. All rights reserved.

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