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PCA9561 Ver la hoja de datos (PDF) - NXP Semiconductors.

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PCA9561 Datasheet PDF : 26 Pages
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NXP Semiconductors
PCA9561
Quad 6-bit multiplexed I2C-bus EEPROM DIP switch
SDA
tBUF
SCL
tr
tLOW
tHD;STA
P
S
tHD;DAT
tf
tHIGH
tSU;DAT
Fig 12. Definition of timing
tHD;STA
tSU;STA
Sr
tSP
tSU;STO
0.7 × VDD
0.3 × VDD
0.7 × VDD
0.3 × VDD
P
002aaa986
MUX input
VM
VM
tPHL
tPLZ
VO
MUX output
VM
VOL + 0.3 V
VOL
002aah292
Fig 13. Open-drain output enable and disable times
13. Non-volatile storage specifications
Table 18. Non-volatile storage specifications
Parameter
Specification
memory cell data retention
10 years (minimum)
number of memory cell write cycles
100,000 cycles (minimum)
Application note AN250, “I2C DIP Switch” provides additional information on memory cell
data retention and the minimum number of write cycles.
PCA9561
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 6 November 2012
© NXP B.V. 2012. All rights reserved.
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