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SCN2661 Datasheet PDF : 19 Pages
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Philips Semiconductors
Enhanced programmable communications
interface (EPCI)
Product specification
SCN2661/SCN68661
DESCRIPTION
The Philips Semiconductors SCN2661 EPCI is a universal
synchronous/asynchronous data communications controller chip
that is an enhanced version of the SCN2651. It interfaces easily to
all 8-bit and 16-bit microprocessors and may be used in a polled or
interrupt driven system environment. The SCN2661 accepts
programmed instructions from the microprocessor while supporting
many serial data communications disciplines —synchronous and
asynchronous — in the full- or half-duplex mode. Special support
for BISYNC is provided.
The EPCI serializes parallel data characters received from the
microprocessor for transmission. Simultaneously, it can receive
serial data and convert it into parallel data characters for input to the
microcomputer.
The SCN2661 contains a baud rate generator which can be
programmed to either accept an external clock or to generate
internal transmit or receive clocks. Sixteen different baud rates can
be selected under program control when operating in the internal
clock mode. Each version of the EPCI (A, B, C) has a different set
of baud rates.
FEATURES
Synchronous operation
5- to 8-bit characters plus parity
Single or double SYN operation
Internal or external character synchronization
Transparent or non-transparent mode
Transparent mode DLE stuffing (Tx) and detection (Rx)
Automatic SYN or DLE-SYN insertion SYN, DLE and DLESYN
stripping
Odd, even, or no parity
Local or remote maintenance loopback mode
Baud rate: DC to 1Mbps (1X clock)
Asynchronous operation
5- to 8-bit characters plus parity
1, 1-1/2 or 2 stop bits transmitted
Odd, even, or no parity
Parity, overrun and framing error detection
Line break detection and generation
False start bit detection
Automatic serial echo mode (echoplex)
Local or remote maintenance loopback mode
Baud rate: DC to 1Mbps
(1X clock)
DC to 62.5kbps (16X clock)
DC to 15.625kbps
(64X clock)
OTHER FEATURES
Internal or external baud rate clock
3 baud rate sets
16 internal rates for each set
Double-buffered transmitter and receiver
PIN CONFIGURATIONS
D2 1
28 D1
D3 2
27 D0
RxD 3
GND 4
26 VCC
25 RxC/BKDET
D4 5
24 DTR
D5 6
23 RTS
D6 7
22 DSR
DIP
D7 8
21 RESET
TxC/XSYNC 9
20 BRCLK
A1 10
19 TxD
CE 11
18 TxEMT/DSCHG
A0 12
17 CTS
R/W 13
16 DCD
RxRDY 14
15 TxRDY
INDEX
CORNER
4
1
26
5
25
PLCC
11
19
12
18
TOP VIEW
NOTE:
Pin Functions the same as 28-pin DIP.
Dynamic character length switching
Full- or half-duplex operation
TTL compatible inputs and outputs
RxC and TxC pins are short-circuit protected
Single +5V power supply
No system clock required
SD00077
APPLICATIONS
Intelligent terminals
Network processors
Front-end processors
Remote data concentrators
Computer-to-computer links
Serial peripherals
BISYNC adaptors
1994 Apr 27
1
853-1070 12793

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