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SAA7157

Clock signal generator circuit for digital TV systems (SCGC)

Philips Electronics 

Philips Semiconductors

Clock signal generator circuit for digital TV

systems (SCGC)

PIN CONFIGURATION

Product specification

SAA7157

Fig.2 Pin configuration.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); ground pins as well as supply pins together

connected.

SYMBOL

VDDA

VDDD

Vdiff GND

VO

Ptot

Tstg

Tamb

VESD

PARAMETER

analog supply voltage (pin 5)

digital supply voltage (pins 8 and 17)

difference voltage VDDA − VDDD

output voltage (IOM = 20 mA)

total power dissipation (DIL20)

storage temperature range

operating ambient temperature range

electrostatic handling(1) for all pins

MIN.

−0.5

−0.5

-

−0.5

0

−65

0

-

MAX. UNIT

7.0

V

7.0

V

±100 mV

VDDD V

1.1

W

150 °C

70

°C

tbf

V

Notes

1. Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is

recommended to take normal handling precautions appropriate to “Handling MOS devices”.

May 1992

5

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