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W216

Spread Spectrum FTG for 440BX and VIA Apollo Pro-133

Cypress Semiconductor 

PRELIMINARY

W216

24-MHz Clock Output (Lump Capacitance Test Load = 20 pF)

Parameter

Description

Test Condition/Comments

f

Frequency, Actual

Determined by PLL divider ratio (see m/n below)

fD

Deviation from 24 MHz

(24.004 – 24)/24

m/n

PLL Ratio

(14.31818 MHz x 57/34 = 24.004 MHz)

tR

Output Rise Edge Rate Measured from 0.4V to 2.4V

tF

Output Fall Edge Rate

Measured from 2.4V to 0.4V

tD

Duty Cycle

Measured on rising and falling edge at 1.5V

fST

Frequency Stabilization Assumes full supply voltage reached within 1 ms

from Power-up (cold start) from power-up. Short cycles exist prior to fre-

quency stabilization.

Zo

AC Output Impedance

Average value during switching transition. Used

for determining series termination value.

Min.

0.5

0.5

45

Typ.

24.004

+167

57/34

25

Max.

2

2

55

3

Unit

MHz

ppm

V/ns

V/ns

%

ms

Ω

Ordering Information

Ordering Code

Package

Name

W216

H

Document #: 38-00850

Package Type

56-pin SSOP (300 mils)

13

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