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RTL8196C-GR

IEEE 802.11n AP/ROUTER NETWORK PROCESSOR WITH EEE

Realtek Semiconductor 

RTL8196C

Datasheet

6. Memory Controller

The RTL8196C integrates a memory control module to access external SDRAM and Flash memory.

The interface is designed for PC133 or PC166-compliant SDRAM, and supports auto-refresh mode,

which requires a 4096 refresh cycle within 64ms, and the SDRAM size and timing is configurable in

registers.

The RTL8196C also supports one flash memory chip (NF_CS0#). The interface supports 8/16-bit NOR-

type flash memory. When NOR type is used, the system will boot from KSEG1 at virtual address

0xBFC0_0000 (physical address: 0x1FC0_0000). The flash size is configurable from 1M to 8M bytes for

each chip. If the flash size is set to 4M or 8M bytes, 0xBFC0_0000 still maps the first 4M bytes of flash,

and there will be a new memory mapping from 0xBD00_0000 (0xBD00_0000 maps to chip 0 byte 0).

6.1. SDRAM Control Interface

PC100~PC166-compliant SDRAM is supported. The SDRAM controller supports Auto Refresh mode,

k which requires a 4096-cycle refresh each 64ms. The RTL8196C provides a maximum of 512Mbit address

space (8Mx16x4Banks) and the SDRAM size is configurable.

lte 6.1.1. Features

L • Interface (Bus Width): 16-bit

a IA • Targeted SDR Frequency: Up to 166MHz

T • Supported SDR SDRAM Chip Specification:

Re EN ION ƒ Bank Counts: 2, 4

ƒ Row Counts: 2K (A0~A10), 4K (A0~A11), 8K (A0~A12)

T ƒ Column Counts: 256 (A0~A7), 512 (A0~A8), 1K (A0~A9), 2K (A0~A9, A11)

NFID PORA 6.2. NOR Flash Type Memory

O OR 6.2.1. Features

C C • Interface (Bus Width): 8-bit/16-bit

E • Supports NOR Flash Chip Specification:

ZT ƒ 8-bit: 256Kbyte, 512Kbyte, 1Mbyte, 2Mbyte, 4Mbyte

for ƒ 16-bit: 512Kbyte, 1Mbyte, 2Mbyte, 4Mbyte, 8Mbyte

IEEE 802.11n AP/Router Network Processor with EEE 11

Track ID: JATR-2265-11 Rev. 0.7

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