CY62146CV30 Ver la hoja de datos (PDF) - Cypress Semiconductor

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CY62146CV30

256K x 16 Static RAM

Cypress Semiconductor 

CY62146CV30 MoBL™

Switching Waveforms

Read Cycle 1 (Address Transition Controlled) [12, 13]

tRC

ADDRESS

DATA OUT

tAA

tOHA

PREVIOUS DATA VALID

DATAIN VALID

Read Cycle 2 (OE Controlled) [13, 14]

ADDRESS

CE

OE

BHE/BLE

tRC

tACE

tDOE

ttLLZZOOEE

DATA OUT

VCC

SUPPLY

CURRENT

tDBE

tLZBE

HIGH IMPEDANCE

tLZCE

tPU

50%

DATA VALID

tPD

tHZCE

tHZOE

tHZBE

HIGH

IMPEDANCE

ICC

50%

ISB

Notes:

12. Device is continuously selected. OE, CE = VIL, BHE, BLE = VIL.

13. WE is HIGH for Read cycle.

14. Address valid prior to or coincident with CE, BHE, BLE transition LOW.

Document #: 38-05203 Rev. **

Page 6 of 12

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