FM25C160B-GA(2014) Ver la hoja de datos (PDF) - Cypress Semiconductor
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FM25C160B-GA Datasheet PDF : 20 Pages
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FM25C160B
Pinout
Figure 1. 8-pin SOIC pinout
CS 1
8
SO 2 Top View 7
not to scale
WP 3
6
VSS 4
5
VDD
HOLD
SCK
SI
Pin Definitions
Pin Name
CS
SCK
SI[1]
SO[1]
WP
HOLD
VSS
VDD
I/O Type
Description
Input
Chip Select. This active LOW input activates the device. When HIGH, the device enters
low-power standby mode, ignores other inputs, and tristates the output. When LOW, the device
internally activates the SCK signal. A falling edge on CS must occur before every opcode.
Input
Serial Clock. All I/O activity is synchronized to the serial clock. Inputs are latched on the rising
edge and outputs occur on the falling edge. Because the device is synchronous, the clock
frequency may be any value between 0 and 15 MHz and may be interrupted at any time.
Input
Serial Input. All data is input to the device on this pin. The pin is sampled on the rising edge of
SCK and is ignored at other times. It should always be driven to a valid logic level to meet IDD
specifications.
Output
Serial Output. This is the data output pin. It is driven during a read and remains tristated at all
other times including when HOLD is LOW. Data transitions are driven on the falling edge of the
serial clock.
Input
Write Protect. This active LOW pin prevents write operation to the Status Register when WPEN
is set to ‘1’. This is critical because other write protection features are controlled through the
Status Register. A complete explanation of write protection is provided in Status Register and
Write Protection on page 7. This pin must be tied to VDD if not used. Note that the function of WP
is different from the FM25160.
Input
HOLD Pin. The HOLD pin is used when the host CPU must interrupt a memory operation for
another task. When HOLD is LOW, the current operation is suspended. The device ignores any
transition on SCK or CS. All transitions on HOLD must occur while SCK is LOW. This pin must
be tied to VDD if not used.
Power supply Ground for the device. Must be connected to the ground of the system.
Power supply Power supply input to the device.
Note
1. SI may be connected to SO for a single pin data interface.
Document Number: 001-86150 Rev. *A
Page 3 of 20
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