MX25L12855E Ver la hoja de datos (PDF) - Macronix International
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MX25L12855E
Macronix International
MX25L12855E Datasheet PDF : 70 Pages
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MX25L12855E
Figure 13. Read Identification (RDID) Sequence (Command 9F)........................................................................... 46
Figure 14. Read Identification (RDID) Sequence (Parallel)..................................................................................... 46
Figure 15. Read Status Register (RDSR) Sequence (Command 05)..................................................................... 47
Figure 16. Write Status Register (WRSR) Sequence (Command 01).................................................................... 47
Figure 17. Read Data Bytes (READ) Sequence (Command 03)........................................................................... 48
Figure 18. Read at Higher Speed (FAST_READ) Sequence (Command 0B)........................................................ 48
Figure 19. Fast DT Read (FASTDTRD) Sequence (Command 0D)........................................................................ 49
Figure 20. 2 x I/O Read Mode Sequence (Command BB)...................................................................................... 49
Figure 21. Fast Dual I/O DT Read (2DTRD) Sequence (Command BD)................................................................ 50
Figure 22. 4 x I/O Read Mode Sequence (Command EB)...................................................................................... 50
Figure 23. 4 x I/O Read Enhance Performance Mode Sequence (Command EB)................................................. 51
Figure 24. Fast Quad I/O DT Read (4DTRD) Sequence (Command ED)............................................................... 52
Figure 25. Fast Quad I/O DT Read (4DTRD) Enhance Performance Sequence (Command ED).......................... 53
Figure 26. Page Program (PP) Sequence (Command 02)..................................................................................... 54
Figure 27. 4 x I/O Page Program (4PP) Sequence (Command 38)....................................................................... 54
Figure 28. Continously Program (CP) Mode Sequence with Hardware Detection (Command AD)........................ 55
Figure 29. Sector Erase (SE) Sequence (Command 20)....................................................................................... 55
Figure 30. Block Erase (BE) Sequence (Command D8)........................................................................................ 55
Figure 31. Chip Erase (CE) Sequence (Command 60 or C7)................................................................................ 56
Figure 32. Deep Power-down (DP) Sequence (Command B9).............................................................................. 56
Figure 33. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command AB)... 56
Figure 34. Release from Deep Power-down (RDP) Sequence (Command AB).................................................... 57
Figure 35. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90 or EF or DF or CF)..... 57
Figure 36. READ ARRAY SEQUENCE (Parallel)................................................................................................... 58
Figure 37. AUTO PAGE PROGRAM TIMING SEQUENCE (Parallel).................................................................... 59
Figure 38. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Parallel).............. 60
Figure 39. Read Electronic Manufacturer & Device ID (REMS) Sequence (Parallel)............................................ 61
Figure 40. Write Protection Selection (WPSEL) Sequence (Command 68)........................................................... 62
Figure 41. Single Block Lock/Unlock Protection (SBLK/SBULK) Sequence (Command 36/39)............................ 62
Figure 42. Read Block Protection Lock Status (RDBLOCK) Sequence (Command 3C)....................................... 62
Figure 43. Gang Block Lock/Unlock (GBLK/GBULK) Sequence (Command 7E/98)............................................. 63
Figure 44. Power-up Timing.................................................................................................................................... 63
Table 9. Power-Up Timing and VWI Threshold....................................................................................................... 63
INITIAL DELIVERY STATE...................................................................................................................................... 63
RECOMMENDED OPERATING CONDITIONS......................................................................................................... 64
ERASE AND PROGRAMMING PERFORMANCE..................................................................................................... 65
LATCH-UP CHARACTERISTICS............................................................................................................................... 65
ORDERING INFORMATION....................................................................................................................................... 66
PART NAME DESCRIPTION..................................................................................................................................... 66
PACKAGE INFORMATION........................................................................................................................................ 67
REVISION HISTORY ................................................................................................................................................. 69
P/N: PM1466
REV. 0.05, MAR. 05, 2009
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