MX98L715BEC Ver la hoja de datos (PDF) - Macronix International

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MX98L715BEC

3.3V SINGLE CHIP FAST ETHERNET NIC CONTROLLER

Macronix International 

MX98L715BEC

5.1.13 PCI POWER MANAGEMENT COMMAND AND STATUS REGISTER ( PPMCSR ) ( 4Bh-48h )

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

000 00 0 00

000 00 0

Data

Bridge Extension Support

PME_Status

Data_Scale

Data_Select

PME_EN

Reserved

Power State

bit 1-0 : Power_State, read/write, D0 mode is 00, D1 mode is 01, D2 mode is 10, D3 hot mode is 11.

bit7-2 : all 0. Reserved.

bit8 : PME_EN, set 1 to enable PMEB and LANWAKE pins. Set 0 to disable PMEB and LANWAKE assertion.

bit 12-9 : Data_Select for report in the Data register located at bit 31:24. Not supported, reset to 0.

bit 14-13 : Data_Scale, read only, not supported, reset to 0.

bit 15 : PME_Status independent of the state of PME_EN. Cleared during power up.

When set, indicates a PME event.

Write 1 to clear the PMEB and LANWAKE assertion, PME-Status become 0. Write 0, no effect.

bit 21-16 : Reserved.

bit 22 : B2_B3# = 0, BPCC_EN = 1, read only, not support.

bit 23 : BPCC_EN = 0, Bus Power/Clock Control Enable, read only, not support.

bit 31-24 : Data = 0, read only, not support.

P/N:PM0695

REV. 0.3, MAR. 30, 2001

13

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