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BT8110

High-Capacity ADPCM Processor

Conexant Systems 

Appendix B . T1 Speech Compression

B.1 Introduction

Bt8110/8110B

High-Capacity ADPCM Processor

serial output with the same delay as when ADPCM decoding is taking place. The

input to PSIG[0], the LSB, must be held at a logic low level in this application.

Table B-2. Microcontroller Memory Map

Address

(hex)

Function

0

Encoder 0 Control

1

Decoder 0 Control

2

Encoder 1 Control

•

•

•

•

•

•

0x3E

Encoder 31 Control

0x3F

Decoder 31 Control

0x40

Mode Control

0

Encoder/Decoder 0 Control

1

Encoder/Decoder 1 Control

2

Encoder/Decoder 2 Control

•

•

•

•

•

•

0x3E

Encoder/Decoder 62 Control

0x3F

Encoder/Decoder 63 Control

0x40

Mode Control

Bit

Function

D[2:0]

D[3]

D[4]

Operation Mode

32/64-Channel Operation

Serial PCM, Parallel ADPCM Mode

D[3:0]

D[4}

D[5]

D[6]

Code Select (codes 6, 7 are invalid)

Set Encoder/Decoder Transparent

Reset Encoder/Decoder

Set Encoder/Decoder to A-Law PCM

B-6

Conexant

100060C

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