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DAP011

PWM Current−Mode Controller for High−Power Universal Off−Line Supplies

ON Semiconductor 

DAP011/DAP011C

Figure 28. The Part is Reset when VCC Reaches 5.0 V

If for any reason Pin 2 level grows above 3.0 V, the part

immediately stops pulsing and stays latched in this position

until the user cycles down the power supply. The reset

actually occurs if VCC drops below 5.0 V. Figure 28 details

the operating diagrams in case of a fault. Please note the

presence of RC time constant on the comparator output,

aimed to filtering any spurious oscillations linked to an

eventual noise presence. The typical value of this time

constant is 20 ms.

Internal Reference Voltage

A 5.0 V reference voltage is pinned out on Pin 11 and can

source up to 5.0 mA. Figure 29 details how the reference

voltage can be externally used, for instance to build a precise

Over Temperature Protection (OTP) circuitry. This 5.0 V

source is shut down during the startup phase and goes low

as soon as VCC crosses VCC(min). It stays low during the

double hiccup mode to keep the consumption to the lowest.

We recommend to wire a 100 nF from this pin to ground in

order to improve the noise immunity.

11

T

UVLO

Fault

+

Vref

C1

10 nF

2

Rlower

+

−

+

Vlatch

20 ms time constant

S

Q

Q

latched

fault

R

5 V reset

Figure 29. The Reference Voltage is used with the

Latchoff Input to Trigger the Circuit in Presence of

an OTP

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