78Q2120C Ver la hoja de datos (PDF) - TDK Corporation

Número de pieza

componentes Descripción

Lista de partido

78Q2120C

10/100BASE-TX Transceiver

TDK Corporation 

78Q2120C

10/100BASE-TX Transceiver

REGISTER DESCRIPTION

The 78Q2120C implements 11 16-bit registers, which are accessible via the MDIO and MDC pins. The supported

registers are shown below in the following table. Attempts to read unsupported registers will be ignored and the

MDIO pin will not be enabled as an output, as per the IEEE 802.3 specification. All of the registers except those,

which are unique to the 78Q2120C, will respond to the broadcast PHYAD value of ‘00000’. The registers specific

to the 78Q2120C occupy address space MR16-22.

Address

0

1

2

3

4

5

6

7

8-14

15

16

17

18

19

Symbol

MR0

MR1

MR2

MR3

MR4

MR5

MR6

MR7

MR8-14

MR15

MR16

MR17

MR18

MR19

Name

Control

Status

PHY Identifier 1

PHY Identifier 2

Auto-Negotiation Advertisement

Auto-Negotiation Link Partner Ability

Auto-Negotiation Expansion

Not Implemented

Reserved

Not Implemented

Vendor Specific

Interrupt Control/Status Register

Diagnostic Register/Test Register

Transceiver Control

Default (Hex)

(3100)

(7809)

000E

70C5

(01E1)

0000

0000

0000

0000

0000

(0140)

0000

0000

4XXX

Legend:

Type

R

SC

0/1

Description

Readable by management.

Writeable by management. Self

Clearing.

Default value upon power up or

reset

Type

W

RC

(0/1)

Description

Writeable by management.

Readable by management.

Cleared upon a read operation.

Default value dependent on pin

settings. The value in bracket

indicates typical case.

© 2003 TDK Semiconductor Corporation, Proprietary and Confidential

- 10 -

Rev_1.1

Share Link: