RTL8139D Ver la hoja de datos (PDF) - Unspecified
Número de pieza
componentes Descripción
Lista de partido
RTL8139D Datasheet PDF : 67 Pages
| |||
Bit
R/W
Symbol
1110 = 14/16
RTL8139DL
Datasheet
Description
1111 = 15/16
23-18
17
16
15-13
12-11
10-8
7
-
-
Reserved
R/W
MulERINT Multiple early interrupt select: When this bit is set, any received
packet invokes early interrupt according to MULINT<MISR[11:0]>
setting in early mode. When this bit is reset, the packets of familiar
protocols (IPX, IP, NDIS, etc) invoke an early interrupt according to
RCR<ERTH[3:0]> setting in early mode. The packets of unfamiliar
protocols will invoke an early interrupt according to the setting of
MULINT<MISR[11:0]>.
R/W
RER8
The RTL8139D(L) receives the error packet whose length is larger than
8 bytes after setting the RER8 bit to 1.
The RTL8139D(L) receives the error packet larger than 64-byte long
when the RER8 bit is cleared. The power-on default is zero.
If AER or AR is set, the RER will be set when the RTL8139D(L)
receives an error packet whose length is larger than 8 bytes. The RER8
is “ Don’t care “ in this situation.
R/W
RXFTH2, 1, 0 Rx FIFO Threshold: Specifies Rx FIFO Threshold level. When the
number of the received data bytes from a packet, which is being received
into the RTL8139D(L)'s Rx FIFO, has reached to this level (or the FIFO
has contained a complete packet), the receive PCI bus master function
will begin to transfer the data from the FIFO to the host memory. This
field sets the threshold level according to the following table:
000 = 16 bytes
001 = 32 bytes
010 = 64 bytes
011 = 128 bytes
100 = 256 bytes
101 = 512 bytes
110 = 1024 bytes
111 = no rx threshold. The RTL8139D(L) begins the transfer of data
after having received a whole packet in the FIFO.
R/W
RBLEN1, 0 Rx Buffer Length: This field indicates the size of the Rx ring buffer.
00 = 8k + 16 byte
01 = 16k + 16 byte
10 = 32K + 16 byte
11 = 64K + 16 byte
R/W
MXDMA2, 1, 0 Max DMA Burst Size per Rx DMA Burst: This field sets the maximum
size of the receive DMA data bursts according to the following table:
000 = 16 bytes
001 = 32 bytes
010 = 64 bytes
011 = 128 bytes
100 = 256 bytes
101 = 512 bytes
110 = 1024 bytes
111 = unlimited
R/W
WRAP
When set to 0: The RTL8139D(L) will transfer the rest of the packet
data into the beginning of the Rx buffer if this packet has not been
completely moved into the Rx buffer and the transfer has arrived at the
end of the Rx buffer.
Single Chip Multifunction 10/100 Ethernet Controller w/Power Management 16 Track ID: JATR-1076-21 Rev. 1.2
Share Link: 