LF4415 Ver la hoja de datos (PDF) - LUXPIA

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Lista de partido

LF4415

Video Memory / FIFO

LUXPIA 

PRELIMINARY

LF4460

LF4430

LF4415

Video Memory / FIFO

FRAME

MEMORY

Figure 1. Single-Channel FIFO Configuration

ADDR[23:0]

24

RDWRB

ADDRESS OVERRIDE

CONTROL

WCLK0

WEN0

WIEN0

1

WCLR0

1

WSET0

WRITE

WRITE

ADDRESS

CONTROL & CONTROL

READ

ADDRESS

READ

& CONTROL CONTROL

RCLK

1

REN0

RCLR

6

RSET

D0[11:0] 24

D1[11:0]

1

MEMORY ARRAY

15 Mbit

30 Mbit

60 Mbit

8

FLAGS

OE0

24 Q0[11:0]

Q1[11:0]

PF0

COLLIDE0

PE0

MODE

I2C

JTAG

4

MODE

7

SDA SCL CHIP_ADDR6-0

TDI TDOTMS TCK

Figure 2. Dual Independent FIFOs Configuration

WCLK0

WEN0

WIEN0

1

WRITE

WRITE ADDRESS

CONTROL

READ

ADDRESS

READ

CONTROL

RCLK

1

REN0

RCLR

WCLR0

WSET0

1

MEMORY CELL ARRAY

6

RSET

12

D0[11:0]

1

7 Mbit

15 Mbit

30 Mbit

OE0

12

8

Q0[11:0]

12

D1[11:0]

1

WCLK1

MEMORY CELL ARRAY

7 Mbit

15 Mbit

30 Mbit

WEN1

WIEN1

1

WCLR1

WSET1

1

WRITE

CONTROL

WRITE

ADDRESS

READ

ADDRESS

READ

CONTROL

8

1

6

OE1

12

Q1[11:0]

RCLK

REN1

RCLR

RSET

MODE

I2C

JTAG

4

7

MODE SDA SCL CHIP_ADDR6-0 TDI TDO TMS TCK

FLAGS

0

FLAGS

1

PF0

COLLIDE0

PE0

PF1

COLLIDE1

PE1

LOGIC Devices Incorporated

www.logicdevices.com

3

High Performance Memory Product

January 23, 2008 LDS-44xx-A

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