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AD8351ARM_04

Low Distortion Differential RF/IF Amplifier

Analog Devices 

AD8351

RF

SINGLE-

ENDED

50⍀

SOURCE

R1

50⍀

INHI

100nF

RG

INLO

25⍀ 100nF

OPHI

25⍀

AD8351

OPLO 25⍀

VOCM

100nF

AIN

AD6645

AIN VREF

DIGITAL

OUT

Figure 8. ADC Driving Application Using Single-Ended Input

ANALOG MULTIPLEXING

The AD8351 can be used as an analog multiplexer in applications

where it is desirable to select multiple high speed signals. The

isolation of each device when in a disabled state (PWUP pin pulled

low) is about 60 dBc for the maximum input level of 0.5 V p-p out

to 100 MHz. The low output noise spectral density allows for a

simple implementation as depicted in Figure 9. The PWUP inter-

face can be easily driven using most standard logic interfaces. By

using an N-bit digital interface, up to N devices can be controlled.

Output loading effects and noise need to be considered when using

a large number of input signal paths. Each disabled AD8351 pre-

sents approximately a 700 Ω load in parallel with the 150 Ω output

source impedance of the enabled device. As the load increases due

to the addition of N devices, the distortion performance will degrade

due to the heavier loading. Distortion better than –70 dBc can be

achieved with four devices muxed into a 1 kΩ load for signal fre-

quencies up to 70 MHz.

BIT 1

N-BIT

DIGITAL

INTERFACE

SIGNAL

INPUT 1

INHI

PWUP

OPHI

RGP1

RG

AD8351

RGP2

INLO

OPLO

SIGNAL

INPUT 2

BIT 2

INHI

PWUP

OPHI

RGP1

RG

AD8351

RGP2

INLO

OPLO

MUX

OUTPUT

LOAD

I/O CAPACITIVE LOADING

Input or output direct capacitive loading greater than a few pico-

farads can result in excessive peaking and/or oscillation outside

the pass band. This results from the package and bond wire induc-

tance resonating in parallel with the input/output capacitance of

the device and the associated coupling that results internally

through the ground inductance. For low resistive load or source

resistance, the effective Q is lower, and higher relative capaci-

tance termination(s) can be allowed before oscillation or excessive

peaking occurs. These effects can be eliminated by adding series

input resistors (RIP) for high source capacitance, or series output

resistors (ROP) for high load capacitance. Generally less than

25 Ω is all that is required for I/O capacitive loading greater than

~2 pF. The higher the C, the smaller the R parasitic suppression

resistor required. In addition, RIP also helps to reduce low gain

in-band peaking, especially for light resistive loads.

CSTRAY

CSTRAY

RIP

RG

RIP

ROP

AD8351

ROP

CL

RL

1k⍀

CL

Figure 10. Input and Output Parasitic Suppression

Resistors, RIP and ROP, Used to Suppress

Capacitive Loading Effects

Due to package parasitic capacitance on the RG ports, high RG

values (low gain) cause high ac-peaking inside the pass band,

resulting in poor settling in the time domain. As an example,

when driving a 1 kΩ load, using 25 Ω for RIP reduces the peaking

by ~7 dB for RG equal to 200 Ω (AV = 10 dB) (see Figure 11).

BIT N

SIGNAL

INPUT N

INHI

PWUP

OPHI

RGP1

RG

AD8351

RGP2

INLO

OPLO

Figure 9. Using Several AD8351s to Form an

N-Channel Analog MUX

Figure 11. Reducing Gain Peaking with Parasitic

Suppressing Resistors (RIP = 25 Ω, RL = 1 kΩ)

–12–

REV. B

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