IMIC9530CY Ver la hoja de datos (PDF) - Silicon Laboratories
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IMIC9530CY Datasheet PDF : 10 Pages
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C9530
Byte 0: Function Select Register (continued)
Bit @Pup
1
0
0
1
Name
HWSEL
Description
SA0 Bank LSB frequency control bit (effective only when Bit 0 of this register is set to a 0)
Hardware/SMBus frequency control. 1 = Hardware (pins 6, 7, 42, 43 and 27), 0 = SMBus
Byte 0 bits 1-4, & 6
Table 4. Clarification Table for Byte0, bit 5
Byte0, bit6
0
0
1
1
Byte0, bit5
0
1
0
1
Description
Frequency generated from second PLL
Frequency generated from XIN
Spread @ –1.0%
Spread @ –0.5%
Table 5. Test Table
Test Function Clock
Frequency
CLKA
XIN/6
Outputs
CLKB
XIN/4
REF
XIN
Byte 1: A Bank and REF Clock Control Register
Bit
@Pup
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
Name
REFEN
Reserved
Reserved
REF Output Enable
0 = Disable, 1= Enable
CLKA4 Output Enable
0 = Disable, 1= Enable
CLKA3 Output Enable
0 = Disable, 1= Enable
CLKA2 Output Enable
0 = Disable, 1= Enable
CLKA1 Output Enable
0 = Disable, 1= Enable
CLKA0 Output Enable
0 = Disable, 1= Enable
Description
Byte 2: PCI Register
Bit
@Pup
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
Name
18
19
22
23
24
Reserved
Reserved
Reserved
CLKB4 Output Enable
0 = Disable, 1= Enable
CLKB3 Output Enable
0 = Disable, 1= Enable
CLKB2 Output Enable
0 = Disable, 1= Enable
CLKB1 Output Enable
0 = Disable, 1= Enable
CLKB0 Output Enable
0 = Disable, 1= Enable
Description
.......................Document #: 38-07033 Rev. *C Page 4 of 10
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