PSB4596V3.1 Ver la hoja de datos (PDF) - Siemens AG

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PSB4596V3.1

Analog Line Interface Solution ALIS V3

Siemens AG 

PSB 4595 / PSB 4596

Analog Line Interface Solution

Interfaces Overview

6

Interfaces Overview

6.1 Clocking

Any master clock frequency within the range 16.384 MHz to 50 MHz can be input to

PSB 4596. Siemens recommends a a clock frequency of 24.567 MHz.

6.2 Sampling Frequency

The sampling frequency can be programmed within the range 7.2 kHz to 16 kHz,

accurate to less than 1 Hz. When programming different sampling frequencies, the pass-

band behavior will also change relative to the frequency.

The diagrams below show this behavior for three example sample frequencies of

7200 Hz, 8000 Hz and 9600 Hz. (High-pass filter enabled).

Note: In V.90 modem applications, the 50/60 Hz high-pass filter can be turned off.

.125

0

A8000( f)

A9600( f)

0.2

A7200( f)

7200 8000

0.4

.5

0

100

1000

2000

f

Input Frequency - Hz

3000

Figure 9 Receive Filter Passband Ripple

9600

4000

4000

Semiconductor Group

20

Product Overview 06.98

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