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KBC1100L-PU Hoja de datos - SMSC -> Microchip

KBC1100L image

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KBC1100L-PU

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6 Pages

File Size
212.9 kB

Fabricante
SMSC
SMSC -> Microchip SMSC

General Description
The KBC1100L is an integrated Keyboard/System Management Controller which incorporates a high performance 8051 Micro-Controller, an LPC Bus/Firmware Hub Host Interface and a Super I/O. The KBC1100L is powered by two separate supply planes (VCC1, VCC0) to provide “instant on” and sophisticated system power management functions. The KBC1100L power control circuitry supports multiple low power-down modes.

PRODUCT FEATURES
■ 3.3V Operation with 5V Tolerant Buffers
■ ACPI 1.0b/2.0 and PC99a/PC2001 Compliant
■ LPC Interface with Clock Run Support
   — Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
   — 15 Direct IRQs
   — Three 8-Bit DMA Channels
   — ACPI SCI Interface
   — nSMI
   — Shadowed write only registers
■ LPC/Firmware Hub Host Flash Interface
   — Single Byte FWH Memory Read and FWH Memory Write Support
   — FWH ID Support
   — 16MB FWH Flash and Register Addressing, 128K Legacy BIOS Addressing
   — Single Byte LPC Memory Read and LPC Memory Write Support
■ Serial Peripheral Interface (SPI)
   — 2-pin interface with single Data In/Out Data pin
   — Single Ported Controller with Keeper Circuit
■ 8 MByte Shared FlashROM Interface (SFI)
   — 8051/Host CPU Hardware Arbitrated Interface
   — 0.5 - 8MB - Host System BIOS & 8051 Keyboard
   — 8051 64KB Code Space Accessible as Separate 32KB Pages in Flash
   — Low-Power Flash Access Modes
   — 8051-Programmable Flash Access Protection
   – Read/Write/No-Access Protection
   – Variable Bank Sizes
■ Host Flash Address Redirection for Recovery
■ Serial Flash Programming Interface
■ Two Power Planes
   — Low Standby Current in Sleep Mode
   — Intelligent Auto Power Management for Super I/O
   — Main powered blocks power supplied by standby power plane and controlled by power management signals
■ 3-Port ACPI Embedded Controller Interface
■ Configuration Register Set
   — Compatible with ISA Plug-and-Play Standard (Version 1.0a)
   — Four Pin Selectable Addressing Options
   — 8051-Programmable Base Address
■ High-Performance Embedded 8051 Keyboard and System Controller
   — Provides System Power Management
   — System Watch Dog Timer (WDT)
   — 8042 Style Host Interface Relocatable to 480 Different Base I/O Addresses
   — Supports Interrupt and Polling Access
   — Interrupt Accelerator
   — 512 Bytes Data RAM
   — 2 Kilobytes Scratch ROM/RAM
   — On-Chip Memory-Mapped Control Registers
   — Up to 18x8 Keyboard Scan Matrix
   — Two 16 Bit Timer/Counters
   — Eleven 8051 Interrupt Sources
   — Thirty-Two 8-Bit, Host/8051 Mailbox Registers
   — Thirty-six Maskable Hardware Wake-Up Events
   — Fast GATEA20
   — Fast CPU_RESET
   — Multiple Clock Sources and Operating Frequencies up to 32MHz
   — IDLE and SLEEP Modes
   — Low Power Fail-Safe Ring Oscillator ±10% Accuracy
   — Hibernation Timer with programmable wake-up from 0.5ms to 128 minutes
   — 8051-Driven 16550A UART
   – 16-Byte Send/Receive FIFOs
   – External Baud Clock Option
   — Power-Fail Status Register
■ Battery Backed Resources
   — 32KHz clock generator
   — 1 Week Wakeup timer
■ One 8584-Style SMBus Controller
   — 8051 Host Interface Logic Allows Master or Slave Operation
   — Controllers are Fully Operational on Standby Power
   — 2 Ports per Controller

 

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