[LSI LOGIC]

Overview
This manual describes the L80227 device. The device contains a single PHY channel. The convention used in this manual is that device refers to the IC, and channel ref ers to the PHY in the device. The L80227 is a highly-integrated analog interf ace IC f or twisted-pair Ethernet applications and can be congured for either 100 Mbits/s (100BASE-TX) or 10 Mbits/s (10BASE-T) Ethernet operation.
The PHY channel contains the f ollowing blocks:

4B5B Encoder/Manchester Encoder
Scrambler
10BASE-T T ransmitter
100BASE-TX T ransmitter
10BASE-T Receiver
100BASE-TX Receiver
Squelch
Clock and Data Recovery
Link Integrity and Autonegotiation
Descrambler
4B5B Decoder/Manchester Decoder
MII Controller Interf ace
Management Interf ace (MI)
Collision Detection

FEATUREs
The f ollowing list summarizes the salient f eatures of the devices:
Single-chip solution f or a 10BASE-T/100BASE-TX PHY
Dual speed: 10/100 Mbit/s
Half-duplex or full-duplex operation
MII interf ace to Ethernet MAC
Management Interf ace (MI) for conguration and status
AutoNegotiation for 10/100 Mbit/s, full/half duplex operation
AutoNegotiation Adver tisement control through pins
All applicable IEEE 802.3, 10BASE-T and 100BASE-TX specications are met
On-chip wave shaping (no external lters required)
Adaptive equalizer f or 100BASE-TX operation
Baseline wander correction
Minimum number of external components
LEDs are individually programmable to reect any the f ollowing events:
– Link
– Activity
– Collision
– Full-Duplex
– 10/100 Mbits/s
3.3 V power supply , 5 V tolerant I/O
64-pin LQFP
Operating temperature ranges available:
– Commercial (L80227):0˚ to +70˚ C
– Industrial (L80227 I): -40˚ to +85˚ C