datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga
HOME  >>>  International Cmos Technology  >>> PEEL18LV8Z PDF

PEEL18LV8Z Hoja de datos - International Cmos Technology

PEEL18LV8Z image

Número de pieza
PEEL18LV8Z

Other PDF
  no available.

PDF
DOWNLOAD     

page
10 Pages

File Size
253.8 kB

Fabricante
International-Cmos
International Cmos Technology International-Cmos

General Description
The PEEL18LV8Z is a Programmable Electrically Erasable Logic (PEEL) SPLD (Simple Programmable Logic Device) that operates over the supply voltage range of 2.7V-3.6V and features ultra-low, automatic "zero" power-down operation. The PEEL18LV8Z is logically and functionally similar to Anachips 5V PEEL18CV8 and PEEL18CV8Z. The "zero power" (25 µA max. Icc) power-down mode makes the PEEL18LV8Z ideal for a broad range of batterypowered portable equipment applications, from hand-held meters to PCMCIA modems. EE-reprogrammability provides both the convenience of fast reprogramming for product development and quick product personalization in manufacturing, including Engineering Change Orders.


FEATUREs
• Low Voltage, Ultra Low Power Operation
    - Vcc = 2.7 to 3.6 V
    - Icc = 5 µA (typical) at standby
    - Icc = 1.5 mA (typical) at 1 MHz
    - Meets JEDEC LV Interface Spec (JEDSD8-A)
    - 5 Volts tolerant inputs and I/O’s
• CMOS Electrically Erasable Technology
    - Superior factory testing
    - Reprogrammable in plastic package
    - Reduces retrofit and development costs
• Application Versatility
    - Replaces random logic
    - Super set of standard PLDs
    - Pin and JEDEC compatible with 16V8
    - Ideal for battery powered systems
    - Replaces expensive oscillators
• Architectural Flexibility
    - Enhanced architecture fits in more logic
    - 113 product terms x 36 input AND array
    - 10 inputs and 8 I/O pins
    - 12 possible macrocell configurations
    - Asynchronous clear, Synchronous preset
    - Independent output enables
    - Programmable clock; pin 1 or p-term
    - Programmable clock polarity
    - 20 Pin DIP/SOIC/TSSOP and PLCC
    - Schmitt triggers on clock and data inputs
• Schmitt Trigger Inputs
    - Eliminates external Schmitt trigger devices
    - Ideal for encoder designs

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

Número de pieza
componentes Descripción
PDF
Fabricante
CMOS Programmable Electrically Erasable Logic Device
Ver
International Cmos Technology
CMOS Programmable Electrically Erasable Logic Device
Ver
International Cmos Technology
CMOS Programmable Electrically Erasable Logic Device
Ver
Anachip Corporation
CMOS Programmable Electrically Erasable Logic Device
Ver
International Cmos Technology
CMOS Programmable Electrically Erasable Logic Device
Ver
Anachip Corporation
CMOS Programmable Electrically Erasable Logic Device
Ver
Anachip Corporation
CMOS Programmable Electrically Erasable Logic Device
Ver
Anachip Corporation
CMOS Programmable Electrically Erasable Logic Device
Ver
Unspecified
CMOS Programmable Electrically Erasable Logic Device
Ver
Unspecified
CMOS Programmable Electrically Erasable Logic Device
Ver
International Cmos Technology

Share Link: GO URL

EnglishEnglish Korean한국어 Chinese简体中文 Japanese日本語 Russianрусский

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]