GLT6400M16(2001) Ver la hoja de datos (PDF) - G-Link Technology
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GLT6400M16 Datasheet PDF : 13 Pages
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G-LINK
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input and Output Timing
Reference Level
Output Load Condition
CL = 30pf + 1TTL Load
0.4V to 2.2V
5 ns
1.1V
GLT6400M16
Ultra Low Power 256k x 16 CMOS SRAM
May 2001(Rev. 1.1)
AC Test Loads and Waveforms
TTL
CL*
*Including Scope and Jig Capacitance
Read Cycle (9)( Vcc=2.3V to 2.7V, TA = -25°C to 85°C )
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Output Hold from address Change
Chip Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
BLE , BHE Enable to Output in Low-Z
BLE , BHE Disable to Output in High-Z
BLE , BHE Access Time
120
Symbol
Min Max
tRC 120 -
tAA
- 120
tACE
- 120
tOE
- 60
tOH
15
-
tLZ
20 -
tHZ
0 35
tOLZ
20
-
tOHZ
0 35
tBLZ
20
-
tBHZ
0 35
tBA
- 60
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
4,5
3,4,5
4,5
3,4,5
Timing Waveform of Read Cycle 1 (Address Controlled)
tRC
Address
tOH
tAA
DOUT
Previous Data Valid
Data Valid
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
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G-Link Technology Corporation, Taiwan
6F No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
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