MX98725 Ver la hoja de datos (PDF) - Macronix International

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MX98725

SINGLE CHIP FAST ETHERNET NIC CONTROLLER

Macronix International 

MX98725

5.1.11 PCI POWER MANAGEMENT CAPABILITY REGISTER ( PPMC ) ( 47h-44h )

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

000 00 00 0

PME_Support

D2_Support

D1_Support

AUX_I

DSI

Auxiliary Power Source

PME Clock

Version

Next Pointer

Capability ID

bit 31- 27 : PME_Support, read only indicates the power states in which the function may assert PMEB pin.

bit 31 ---- PME_D3cold (value=1)

bit 30 ---- PME_D3warm

bit 29 ---- PME_D2

bit 28 ---- PME_D1

bit 27 ---- PME_D0

bit 26 : D2 mode support, read only.

bit 25 : D1 mode support, read only.

bit 24-22 : AUX_I bits, Auxiliary Power Reporting, read only.

bit 21 : DSI, read only.

bit 20 : Auxiliary power source, read only.

bit 19 : PME Clock, read only.

bit 18-16 : Version, read only.

bit 15-8 : Next Pointer, read only.

bit 7-0 : Capability ID, read only, a 1 indicates that the data structure currently being pointed to is the PCI power

managment data structure.

5.1.13 PCI POWER MANAGEMENT COMMAND AND STATUS REGISTER ( PPMCSR ) ( 4Bh-48h )

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

000 00 0

Data

Bridge Extension Support

PME_Status

Data_Scale

Data_Select

PME_EN

Reserved

Power State

P/N:PM0488

REV. 1.7, SEP. 15, 1998

10

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