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A43L8316V

128K X 16 Bit X 2 Banks Synchronous DRAM

AMIC Technology 

10. Clock Suspend Exit & Power Down Exit

1) Clock Suspend (=Active Power Down) Exit

CLK

CKE

tSS

Internal Note 1

CLK

CMD

RD

A43L8316

2) Power Down (=Precharge Power Down) Exit

CLK

CKE

tSS

Internal Note 2

CLK

CMD

NOP ACT

11. Auto Refresh & Self Refresh

Note 3

1) Auto Refresh

CLK

CKE

Note 4

PRE

AR

Internal

CLK

CMD

tRP

Note 6

2) Self Refresh

CLK

Note 4

CMD

PRE

SR

CKE

tRP

Note 5

CMD

tRC

CMD

tRC

* Note : 1. Active power down : one or more bank active state.

2. Precharge power down : both bank precharge state.

3. The auto refresh is the same as CBR refresh of conventional DRAM.

No precharge commands are required after Auto Refresh command.

During tRC from auto refresh command, any other command can not be accepted.

4. Before executing auto/self refresh command, both banks must be idle state.

5. MRS, Bank Active, Auto/Self Refresh, Power Down Mode Entry.

6. During self refresh mode, refresh interval and refresh operation are performed internally.

After self refresh entry, self refresh mode is kept while CKE is LOW.

During self refresh mode, all inputs expect CKE will be don’t cared, and outputs will be in Hi-Z state.

During tRC from self refresh exit command, any other command can not be accepted.

Before/After self refresh mode, burst auto refresh cycle (1024K cycles ) is recommended.

Preliminary (April, 2000, Version 1.0)

20

AMIC Technology, Inc.

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