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AD6426

Enhanced GSM Processor

Analog Devices 

Preliminary Technical Information

AD6426

Table 3. H8 Peripheral Control Registers

Address

Name

0 8000h

SMSMR

R/W

1 8001h

SMBRR

R/W

2 8002h

SMSCR

R/W

3 8003h

SMDR

W

4 8004h

SMSSR

R/W

5 8005h

SMDR

R

6 8006h

SMSCMR

R/W

10 8010h

BUFRBR

R

10 8010h

BUFTHR

W

10 8010h

BUFDLL

R/W

11 8011h

BUFIER

R/W

11 8011h

BUFDLM

R/W

12 8012h

BUFIIR

R

12 8012h

BUFFCR

W

13 8013h

BUFLCR

R/W

14 8014h

BUFMCR

R/W

15 8015h

BUFLSR

R/W

16 8016h

BUFMSR

R/W

17 8017h

BUFSCR

R/W

18 8018h

UIBRBR

R

18 8018h

UIBTHR

W

19 8019H

UIBSSR

R/W

26 801AH

UIBER

R

27 801BH

UIBTSR

R

28 801CH

UIBTLR

R/W

29 801Dh

UIBBLR

R

32 8020h

FIXRBR

R

32 8020h

FIXTHR

W

32 8020h

FIXDLL

R/W

33 8021h

FIXIER

R/W

33 8021h

FIXDLM

R/W

34 8022h

FIXIIR

R

35 8023h

FIXLCR

R/W

36 8024h

FIXMCR

R/W

37 8025h

FIXLSR

R/W

38 8026h

FIXMSR

R/W

39 8027h

FIXSCR

R/W

48 8030h

SCCR

R/W

49 8031h

SPSSR

R/W

50 8032h

SDIR1 (MS)

R

51 8033h

SDIR0 (LS)

R

52 8034h

SDOR1 (MS)

W

53 8035h

SDOR0 (LS)

W

Address

Name

64/65 8040/1h DISPDDR

W

66 8042h

DISPCR

R/W

67 8043h

DDOR

W

68 8044h

DDIR

R

69 8045h

DRR

R/W

72 8048h

WDTR

W

80 8050h

MEM IF

R/W

81 8051h

PERST

R/W

82 8052h

PERCR

R/W

84 8054h

TAR

R/W

85 8055h

PERCLK

R/W

96 8060h

RTCTR1

R/W

97 8061h

RTCTR2

R/W

98 8062h

RTCTR3

R/W

99 8063h

RTCTR4

R/W

100 8064h

RTCTR5

R/W

101 8065h

RTCAR1

R/W

102 8066h

RTCAR2

R/W

103 8067h

RTCAR3

R/W

104 8068h

RTCCR

R/W

105 8069h

RTCSRZ

R/W

106 8074h

SERDISPLAY/NMI

R/W

This Information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no

obligation regarding future manufacture unless otherwise agreed to in writing. No responsibility is assumed by Analog Devices for its use; nor for any

infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent

rights of Analog Devices.

Revision Preliminary 2.3 (June 9, ´98)

- 11 -

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