AD6426 Ver la hoja de datos (PDF) - Analog Devices
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AD6426 Datasheet PDF : 50 Pages
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Preliminary Technical Information
AD6426
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0
1
2
3
4
5
6
10
10
10
11
11
12
12
13
14
15
16
17
18
18
19
26
27
28
29
32
32
32
33
33
34
35
36
37
38
39
48
49
50
51
52
53
64/65
7
TIE
TDRE
6
RIE
RDRF
Table 4. H8 Peripheral Register Contents
5
4
3
ODD
TE
ORER
RE
AE
Transmit[7:0]
ERS
PER
Receive[7:0]
2
1
BRR[3:0]
DATEN
CLKPOL
TEND
0
CLKEN
FIFO ST
FIFO ST
RxLevel[1:0]
DLAB
SET BRK
Error Rx FIFO
DCD
TEMT
RI
Stick Par.
THRE
DSR
TE
Tx Trigger Level [3:0]
Chars in TX Buffer [3:0]
FIFO ST
DLAB
Error Rx FIFO
DCD
TEST
FIFO ST
SET BRK
TEMT
RI
RX MODE
SDORIE
Stick Par.
THRE
DSR
CLOCK
SDIROE IE
RxData[7:0]
TxData[7:0]
BRR[7:0]
EDSSI
ELSI
ETBEI
ERBFI
BRR[15:8]
InterruptID[2:0]
Int Pend
DMA
TX FIFO
RX FIFO
FIFO EN
Ev. Parity
Parity EN
Stop Bits
WLS[1:0]
Loop
Out2
Out1
RTS
DTR
Break Interrupt Framing Error Parity Error Overrun Error Data Ready
CTS
DDCD
TERI
DDSR
DCTS
SCR[7:0]
RxData[7:0]
TxData[7:0]
MRESET UIB Enable
PROC
RE
FE
PE
BI
OE
MODEM
TX Level
RX Time
RX Level
Rx Trigger Level [3:0]
Chars in Rx Buffer [3:0]
RxData[7:0]
TxData[7:0]
BRR[7:0]
EDSSI
ELSI
ETBEI
ERBFI
BRR[15:8]
InterruptID[2:0] Int Pend
R
Ev. Parity
Parity EN
Stop Bits
WLS[1:0]
R/W
Loop
Out2
Out1
RTS
DTR
Break Interrupt Framing Error Parity Error Overrun Error Data Ready
CTS
DDCD
TERI
DDSR
DCTS
SCR[7:0]
TX ENABLE CROSSPOINT UCONN
R/W
SWITCH
SWITCH
SDIRIE
SDOR EMT SDIR OE SDIR FULL
Receive[15:8]
Receive[7:0]
Transmit[15:8]
Transmit[7:0]
Data[7:0]
This Information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no
obligation regarding future manufacture unless otherwise agreed to in writing. No responsibility is assumed by Analog Devices for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent
rights of Analog Devices.
Revision Preliminary 2.3 (June 9, ´98)
- 12 -
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