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AD6426 Ver la hoja de datos (PDF) - Analog Devices

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AD6426
ADI
Analog Devices ADI
AD6426 Datasheet PDF : 50 Pages
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Preliminary Technical Information
To transform the TXPA pin into a general purpose output, set
TXPA Width = 0 (CC Control Register 75 and 76), then use
TxPA Polarity flag (CC Control Register 6) to toggle pin state.
To use the CALIBRATERADIO pin as a general purpose
output, set the AUTOCALIBRATE flag to zero and use the
CALIBRATERADIO flag to toggle pin state.
Universal System Connector Interface
A typical GSM handset requires multiple serial connections to
provide data during normal phone operation, manufacturing,
testing, and debug. In an ideal case many of these functions
could be combined into a single multi-purpose system
connector. For example, the USC port can be used for:
Flash code download for manufacturing and updates
Booting - UART interface used to download programs to
H8 memory
DAI Acoustic mode testing - connects System Simulator
(SS) directly to EVBC
DAI Transcoding mode - connects SS to 6426 for speech
codec testing
External DTA (Data Terminal Adapter) - asynchronous
link for MSDI interface
RS232 port - for on-board data services
H8 debug / monitor
Hands-free operation - time shared VBC and H8 port
Receive I/Q monitoring
The Universal System Connector (USC) of the 6426 is
designed such that no external glue logic is required to achieve
this multi-purpose functionality. Furthermore, since the USC’s
function is related to the voiceband and I/Q data serial ports,
the USC block is also responsible for the correct configuration
of these serial data streams.
The actual system connector has the minimum number of pins
to achieve the needed functionality. This save system pins, and
allows for a more reliable connector from a manufacturing and
mechanical standpoint. The USC defines a 5 pin connector
that multiplexes asynchronous, synchronous, and modem
control signals as needed:
Name
I/O Function
USCRX I Receive Data
USCTX O Transmit Data
USCRTS O Ready to Send
USCCTS I/O Clear to Send / Transmit Frame Sync
USCRI 1/O Ring Indicator / Serial Clock
AD6426
Operating modes of the USC
Buffered UART Mode (Booting/Data Services)
This mode attaches the H8/DSP buffered UART to the USC,
bringing out either the serial bit rate clock or the Modem
Control Signal RI. This is the default mode when the phone is
powered up.
The BOOTCODE pin will be latched on RESET high. If
BOOTCODE is high at RESET, execution begins from the
Boot ROM which will configure the buffered UART to
download the FLASH programming code into RAM. The
FLASH program itself is also downloaded via the UART.
An external Data Terminal Adapter can also be used. In this
case Data Services are done external to the phone and then
transferred to and from the H8. With the external Data
Terminal Adapter, the serial bit rate clock output is selected
for USCRI pin.
This mode can be used for a variety of H8 debug tasks as the
UART can be used to simply shift debug information out.
Note that when in this mode if the handshake signals and
serial bit clock are not required, the RTS and RI pins can be
used as extra GPO, and the CTS pin used as an extra GPI.
Time-shared Mode (Multi-switch)
This mode allows time multiplexed communication with both
the H8 and DSP. This is most useful as a hands-free solution,
but can be used for other purposes also e.g., DAI Transcoding
Testing. This mode is used for DAI testing of the DSP’s
speech transcoder in which the DSP’s SPORT0 is connected to
the USC through the Multi-switch.
DAI Acoustic Mode Testing
This mode is used for DAI testing of the 6425’s phone’s
acoustic properties. The VSPORT of the 6425 connects to the
USC through the Multi-switch.
IQ Monitoring
This mode is used for testing the RF receive path and allows
access to the I and Q samples from the AD6425. The AD6425
signals are simply routed to the USC. This means that the
clock and frame sync are provided by the 6425 as well.
16 bit Mode
This mode connects the synchronous data path to the
SDIR/SDOR H8 Peripheral Control Registers, giving the H8
full access to the synchronous port bandwidth. This allows a
fast synchronous communication to an external device, and is
intended to be used for a fast download mechanism.
This Information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices assumes no
obligation regarding future manufacture unless otherwise agreed to in writing. No responsibility is assumed by Analog Devices for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent
rights of Analog Devices.
Revision Preliminary 2.3 (June 9, ´98)
- 18 -
Confidential Information

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