CMX605(2001) Ver la hoja de datos (PDF) - CML Microsystems Plc

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CMX605
(Rev.:2001)

Digital Line to POTS Interface

CML Microsystems Plc 

Digital Line to POTS Interface

CMX605

1.5.8 ‘C-BUS’ Interface

This block provides for the transfer of data and control or status information between the CMX605’s

internal registers and the µC over the ‘C-BUS’ serial bus. Each transaction consists of a single Register

Address byte sent from the µC which may be followed by a single data byte sent from the µC to be

written into one of the CMX605’s Write Only Registers, or a single byte of data read out from one of the

CMX605’s Read Only Registers, as illustrated in Figure 4.

Data sent from the µC on the Command Data (COMDATA) line is clocked into the CMX605 on the rising

edge of the Serial Clock (SERCK) input. Reply Data (REPDATA) sent from the CMX605 to the µC is

valid when the Serial Clock is high. The interface is compatible with the most common µC serial

interfaces such as SCI, SPI and Microwire, and may also be easily implemented with general purpose µC

I/O pins controlled by a simple software routine. See Figure 8 for detailed ‘C-BUS’ timing requirements.

Figure 4 ‘C-BUS’ Transactions

© 2001 Consumer Microcircuits Limited

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D/605/6

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