CMX605(2001) Ver la hoja de datos (PDF) - CML Microsystems Plc
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CMX605 Datasheet PDF : 27 Pages
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Digital Line to POTS Interface
CMX605
1.5.9 ‘C-BUS’ Registers
Write Only Registers
Addr.
$01
$D0
Register
RESET
SETUP
7
N/A
Uncommitted
Amplifier
0 = Disable
1 = Enable
$D1 MODE SPM O/P:
0 = Disable
1 = Enable
$D3
TX D7
DATA
$D4
TX D7
TONES
6
N/A
Tx Enable:
0 = Disable
1 = Enable
Tone/FSK:
0 = Disable
1 = Enable
D6
D6
Command Data Byte (Bits 7 - 0)
5
4
3
N/A
N/A
N/A
DTMF Rx: SPM:
0 = Disable 0 = 12kHz
1 = Enable 1 = 16kHz
Reserved
set to 0
Tone/FSK:
0 = Tone
1 = FSK
D5
Tx Level:
(msb)
D4
Tx Level:
D3
2
N/A
Reserved
set to 0
Tx Level:
(lsb)
D2
1
N/A
FSK mode:
0 = Sync
1 = Async
Tone
Fields:
(msb)
D1
0
N/A
FSK
mode:
0 = V23
1 = Bell
202
Tone
Fields:
(lsb)
D0
D5
D4
D3
D2
D1
D0
Read Only Registers
Addr.
$DF
Register
STATUS
7
FSK Mode:
FSK Tx Data
Underflow
6
FSK Mode:
FSK Tx
Data Ready
Reply Data Byte (Bits 7 - 0)
5
4
3
2
DTMF Rx: DTMF Rx:
DTMF:
DTMF:
Status
Change
1 = Detected
0 = Notone
Timer timed
out
Rx Data
Rx Data
(D3) (msb) (D2)
1
DTMF:
Rx Data
(D1)
0
DTMF:
Rx Data
(D0) (lsb)
Notes:
1. Accessing the RESET Register over the ‘C-BUS’ clears all of the bits in the SETUP, MODE,
TX DATA, TX TONES and STATUS registers. This will initialise the device and put it into zero-
power mode. Please allow 50ms for the oscillator, VBIAS and internal circuits to stabilize when
coming out of zero-power mode.
Note that this is a single-byte ‘C-BUS’ transaction consisting solely of the address byte value $01.
2. If any of bits 5, 6 or 7 of the STATUS Register is ‘1’ then the IRQN output will be pulled low.
3. Reading the STATUS Register clears the IRQN output and also clears bit 5 of the STATUS
Register, if set. Bits 6 and 7 of the STATUS Register are cleared on writing to the TX DATA
Register.
© 2001 Consumer Microcircuits Limited
14
D/605/6
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