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LAN91C110

FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications

SMSC -> Microchip 

FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications

Datasheet

144 TQFP

PIN NO.

NAME

SYMBOL

56-57, 60- RAM Data RD[31:0]

65, 46-48, Bus

50-54, 35-

38, 40-42,

45, 25-28,

30-32, 34

86,84,85, RAM

RA[16:2]

75,72,80, 82- Address

83,81, 77,74- Bus

73, 71-70,67

78

nROE

24,44,58, 68

nRWE[3:0]

2

Crystal 1 XTAL1

3

Crystal 2 XTAL2

1

nLink

nLNK

Status

139 AUI Select AUISEL

23

Transmit TXEN100

Enable

MII

12

Carrier CRS100

Sense MII

8

Receive RX_DV

Data Valid

11

Collision COL100

Detect MII

18,19,21, 22 Transmit TXD[3:0]

Data

6

Transmit TX25

Clock

10

Receive RX25

Clock

16-13 Receive RXD[3:0]

Data

141 Manage- MDI

ment Data

Input

140 Manage- MDO

ment Data

Output

137 Manage- MCLK

ment

Clock

BUFFER

TYPE

I/O4 with

pullups

DESCRIPTION

Bidirectional. Carries the local buffer memory

read and write data. Reads are always 32 bits

wide. Writes are controlled individually at the byte

level.

O4

Outputs. This bus specifies the buffer RAM

doubleword being accessed by the LAN91C110.

O4

O4

Iclk

I with pullup

O4

O12

Output. Active low signal used to read a

doubleword from buffer RAM.

Outputs. Active low signals used to write any

byte, word or dword in RAM.

An external 25 MHz crystal is connected across

these pins. If a TTL clock is supplied instead, it

should be connected to XTAL1 and XTAL2 should

be left open.

Input. General purpose input port used to convey

LINK status (EPHSR bit 14).

Output. Non volatile output pin. Driven by AUI

SELECT (CONFIG bit 8).

Output to MII PHY. Envelope to 100 Mbps

transmission.

I with

pulldown

I with

pulldown

I with

pulldown

O12

Input from MII PHY. Envelope of packet reception

used for deferral and backoff purposes.

Input from MII PHY. Envelope of data valid

reception. Used for receive data framing.

Input from MII PHY. Collision detection input.

Outputs. Transmit Data nibble to MII PHY.

I with pullup Input. Transmit clock input from MII. Nibble rate

clock (25 MHz).

I with pullup Input. Receive clock input from MII PHY. Nibble

rate clock.

I

Inputs. Received Data nibble from MII PHY.

I with MII management data input.

pulldown

O4

MII management data output.

O4

MII management clock.

SMSC LAN91C110 Rev. B

Page 8

DATASHEET

Revision 1.0 (11-04-08)

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