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MC145540
Motorola
Motorola => Freescale Motorola
MC145540 Datasheet PDF : 116 Pages
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2
DEVICE DESCRIPTION
2.1 MC145540 ADPCM CODEC DEVICE DESCRIPTION
The MC145540 is a single channel Mu-Law or A-Law companding PCM codec-filter with an ADPCM
encoder/decoder operating on a single voltage power supply from 2.7 to 5.25 V.
The MC145540 ADPCM Codec is a complete solution for digitizing and reconstructing voice in com-
pliance with CCITT G.714, G.721, G.723, G.726 and ANSI T1.301 and T1.303 for 64, 32, 24, and
16 kbps. This device satisfies the need for high quality, low power, low data rate voice transmission and
storage applications and is offered in 28-pin DIP and SOG packages.
Referring to Figure 2-1, the main functional blocks of the MC145540 are the switched capacitor
technology PCM codec-filter, the DSP based ADPCM encoder/decoder, and the voltage regulated
charge pump. As an introduction to the functionality of the ADPCM Codec, a basic description of these
functional blocks follows.
2.1.1 PCM Codec-Filter Block Description
A PCM codec-filter is a device used for digitizing and reconstructing the human voice. These devices
were developed primarily for the telephone network to facilitate voice switching and transmission. Once
the voice is digitized, it may be switched by digital switching methods or transmitted long distance (T1,
microwave, fiber optics, satellites, etc.) without degradation. The name codec is an acronym from
“COder” for the analog-to-digital converter (ADC) used to digitize voice, and “DECoder” for the digital-
to-analog converter (DAC) used for reconstructing voice. A codec is a single device that does both the
ADC and DAC conversions.
To digitize voice intelligibly requires a signal to distortion of about 30 dB for a dynamic range of about
40 dB. This may be accomplished with a linear 13-bit ADC and DAC, but will far exceed the required
signal to distortion at amplitudes greater than 40 dB below the peak amplitude. This excess perfor-
mance is at the expense of bits of data per sample. Two methods of data reduction are implemented by
compressing the 13-bit linear scheme to companded 8-bit schemes. These companding schemes fol-
low a segmented or “piecewise-linear” curve formatted as sign bit, three chord bits, and four step bits.
For a given chord, all 16 of the steps have the same voltage weighting. As the voltage of the analog input
increases, the four step bits increment and carry to the three chord bits, which increment. When the
chord bits increment, the step bits double their voltage weighting. This results in an effective resolution
of six bits (sign + chord + four step bits) across a 42 dB dynamic range (seven chords above zero, by
6 dB per chord). There are two companding schemes used: Mu-255 Law specifically in North America,
and A-Law specifically in Europe. These companding schemes are accepted world wide.
MOTOROLA
MC145540
2-1

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