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MC145540

ADPCM Codec

Motorola => Freescale 

2.1.3

Charge Pump

The charge pump is the functional block that allows the analog signal processing circuitry of the

MC145540 to operate with a power supply voltage as low as 2.7 V. This analog signal processing circuit-

ry includes the PCM codec-filter function, the transmit trim gain, the receive trim gain, the sidetone gain

control, and the transmit input operational amplifier. This circuitry does not dissipate much current but it

does require a nominal voltage of 5 V for the VDD power supply.

The charge pump block is a regulated voltage doubler that takes twice the current it supplies from the

voltage applied to the VEXT power supply pin, which may range from 2.7 to 5.25 V and generates the

required 5 V VDD supply. The charge pump block receives as inputs the VEXT supply voltage, the same

256 kHz clock that sequences the analog signal processing circuitry, and the Charge Pump Enable

signal from the SCP block. It also makes use of the capacitor connected to the C1+ and C1– pins and

the decoupling capacitor connected to the VDD pin.

2.2 MC145540 FUNCTIONAL DESCRIPTION

A more detailed description of the circuit functionality for the main functional blocks of the MC145540

follows.

2.2.1 Power Supply Configuration

2.2.1.1 ANALOG SIGNAL PROCESSING POWER SUPPLY

All analog signal processing is powered by the VDD pin at 5 V. This voltage may be applied directly to the

VDD pin or 5 V may be obtained by the on-chip 5 V regulated charge pump which is powered from the

VEXT pin. The VEXT pin is the main positive power supply pin for this device.

For applications that are not 5 V regulated, the on-chip 5 V regulated charge pump may be turned on

and C1 will be required. VDD will require a 1.0 µF decoupling capacitor to filter the voltage spikes of the

charge pump. This allows the VEXT power supply to be from 2.7 to 5.25 V. This mode of operation is

intended for hand held applications where three NiCad cells or three dry cells would be the power

supply.

The on-chip 5 V regulated charge pump is a single stage charge pump that effectively series regulates

the amount of voltage it generates and internally applies this regulated voltage to the VDD pin. This 5 V

voltage is developed by connecting the external 0.1 µF capacitor, C1, between the VEXT power supply

pin and the power supply ground pin, VSS. This puts a charge of as much as 2.7 V on C1. The charge

pump circuitry then connects the negative lead of C1 to the VEXT pin, which sums the voltage of C1 with

the voltage at VEXT for a minimum potential voltage of 5.4 V. The charge voltage on C1 is regulated such

that the summing of voltages is regulated to 5 V. This limits all of the voltages on the device to safe levels

for this IC fabrication technology. This charge pumped voltage is then stored on the 1.0 µF capacitor

connected at VDD and VSS, which filters and serves as a reservoir for power. The clock period for this

charge pump is the same 256 kHz as the analog sequencing clock, minimizing noise problems.

For applications with a regulated 5 V (± 5%) power supply, the VDD pin and the VEXT pin are connected

to the 5 V power supply. These pins may share one decoupling capacitor in this configuration as a

function of external noise on the power supply. The on-chip 5 V regulated charge pump should be

turned off via the SCP port at register zero. The external capacitor, C1, should not be populated for

these applications.

2.2.1.2

DIGITAL SIGNAL PROCESSING POWER SUPPLY

This device has an on-chip series regulator which limits the voltage of the Digital Signal Processing

(DSP) circuitry to about 3 V. This reduces the maximum power dissipation of this circuitry. From the

VEXT power supply pin, the DSP circuitry appears as a constant current load instead of a resistive

(CV2/2) load for a constant clock frequency. This series regulator is designed to have a low drop-out

voltage, which allows the DSP circuitry to work when the VEXT voltage is as low as 2.7 V. The output of

this regulator is brought out to the VDSP pin for a 0.1 µF decoupling capacitor. This regulator is not

designed to power any loads external to the device.

2-4

MC145540

MOTOROLA

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