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NM95MS18

Plug & Play Front-end device for ISA-Bus Systems (Supports Windows®-NT, UNIX® and legacy systems)

Fairchild Semiconductor 

Timing Diagrams

AEN

SA[0:15]

IORD*

IOWR*

READ DATA

SD[0:7]

WRITE DATA

SD[0:7}

SA[0:15]

IOCS[0:1]*

(addr decode only)

IORD*

IOWR*

IOCS[0:1]*

(Qualfied with CMD)

Timings for ISA Read/Write Cycle

tAEN

tAC

VALID ADDRESS

tRVD

tAH

tRDH

VALID

tWD

tWDH

Decode Delay for Chipselect Generation

tCSA

VALID ADDRESS

DS500033-3

tCSA

tCSC

tCSC

Propagation Delay for IRQ/DRQ/DACK

DS500033-4

tIDD

IRQ in

DRQ in

ISADACK

IRQ out

DRQ out

DACKOUT

tIDD

DS500033-5

INTRODUCTION

NM95MS18 supports both Plug-n-Play platforms (PC with WIN-

DOWS-95 and/or PnP BIOS) as well as Non-Plug-n-Play plat-

forms (PC with WINDOWS-NT, Win3.x/DOS and Non-PnP BIOS).

The choice of interface (PnP or Non-PnP) is selected by using a

single pin (N_PnP*). Under PnP interface, NM95MS18 is fully

compliant with ISA Plug-n-Play specification (Ver 1.0a) and is

functionally compatible to its predecessor NM95MS16. Under

Non-P 'n' P interface, NM95MS18 powers-up active with a prede-

termined configuration eliminating any need for an external PnP

configuration support. Five external inputs to NM95MS18 allows

to choose the default power-up configuration from 31 different

predetermined configurations. NM95MS18 integrates 2 kbits of

on-board EEPROM to store all the 31 configuration information as

well as an additional 2 kbits EEPROM area to store standard PnP

resource information. Entire memory can be write protected.

NM95MS18 also allows ISA interrupts to be shared.

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