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NM95MS18

Plug & Play Front-end device for ISA-Bus Systems (Supports Windows®-NT, UNIX® and legacy systems)

Fairchild Semiconductor 

Extended Interrupt Mode (Supports PC-95/PC-97 Requirements)

Extended Interrupt Mode

ON

OFF

GND

Switch

VCC

RSTDRV

OSC

IORD*

IOWR*

AEN

SA[0:15]

SD[0:7]

IRQOUT[0:5]

NM95MS18

(Extended

Interrupt Mode)

IOCS0

IOCS1

IOCS1

10K

ISDN

Controller

IRQIN0

DS500033-7

Interface Options of NM95MS18

Plug-n-Play/Non-Plug-n-Play)

1) Plug-n-Play (PnP) Interface ("/N_PNP" = 1)

In a Plug-n-Play environment, a PnP configuration manager

(typically PnP-BIOS, Windows’95 OS or PnP utility) that resides

on the PC would read the Plug-n-Play Resource data fileand

allocate the requested resource (I/O Address space, IRQ etc).

PnP configuration is actually a defined process of updating

defined PnP Registers on a PnP controller in a defined manner.

The entire protocol and Register summary is provided in the ISA

PnP Specification (Ver 1.0a). NM95MS18 is designed to be

completely compliant with the existing ISA PnP standard and

hence provides seamless PnP support for an ISA adapter. All that

is required is to prepare the Plug-n-Play Resource data for an

applicatDuring power-up, NM95MS18 defaults to Plug-n-Play

interface if it senses logic "high" at the "N_PNP*" pin. This pin has

an internal weak pullup logic and hence can be left unconnected

for PnP interface.

2) Non-Plug-n-Play (legacy) Interface ("/N_PNP" = 0)

In a legacy interface NM95MS18 is designed to ignore the

standard PnP configuration protocol and instead self-configure to

a specific configuration. A specific configuration is selected by a

set of switch inputs SW[0:4]. All possible combinations of these 5

inputs provide 31 configurations to choose from (the 32nd configu-

ration is reserved for field programming. Refer section on "Soft-

ware Write Configuration" for more detail). It is also possible to use

fewer than five switch inputs (SW[0:3], SW[0:2], SW[0:1] or SW[0]

to have fewer legacy configurations (15, 7, 3 or 1 respectively). All

these five switch inputs have weak internal pull-up resistor allow-

ing unused switch pins to be left unconnected when necessary.

During power-up, NM95MS18 defaults to Legacy interface if it

senses logic “low” at the “N_P 'n' P*” pin. Along with “N_P 'n' P*”

pin, the state of “SW[0:4]” inputs are also sensed to determine the

particular legacy configuration that needs to be selected. Each

legacy configuration occupies 8 bytes (4 Words) of internal

memory as shown in the following figure.

Configuration #31

•

•

•

•

Configuration #3

Configuration #2

Configuration #1

Word

IOCS0 (MSB)

IOCS0 (LSB)

IOCS1 (MSB)

IOCS1 (LSB)

IOCS2 (MSB)

IRQIN1 IRQIN0

Bit[7:4]

Bit[3:0]

IOCS2 (LSB)

IRQIN1 IRQIN0

TYPE TYPE

X

DRQIN

Bit[7:6] Bit[5:4] Bit[3] Bit[2:0]

8 bytes/

configuration

DS500033-8

7

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