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PCA9561 Datasheet PDF : 26 Pages
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NXP Semiconductors
PCA9561
Quad 6-bit multiplexed I2C-bus EEPROM DIP switch
Table 8.
Write
Read
Default
EEPROM byte 2 register
D7
D6
D5
X
X
EEPROM 2
data F
0
0
EEPROM 2
data F
0
0
0
D4
EEPROM 2
data E
EEPROM 2
data E
0
D3
EEPROM 2
data D
EEPROM 2
data D
0
D2
EEPROM 2
data C
EEPROM 2
data C
0
D1
EEPROM 2
data B
EEPROM 2
data B
0
D0
EEPROM 2
data A
EEPROM 2
data A
0
Table 9.
Write
Read
Default
EEPROM byte 3 register
D7
D6
D5
X
X
EEPROM 3
data F
0
0
EEPROM 3
data F
0
0
0
D4
EEPROM 3
data E
EEPROM 3
data E
0
D3
EEPROM 3
data D
EEPROM 3
data D
0
D2
EEPROM 3
data C
EEPROM 3
data C
0
D1
EEPROM 3
data B
EEPROM 3
data B
0
D0
EEPROM 3
data A
EEPROM 3
data A
0
Table 10. MUX_IN register
D7
D6
Read
0
0
D5
MUX_IN
data F
D4
MUX_IN
data E
D3
MUX_IN
data D
D2
MUX_IN
data C
D1
MUX_IN
data B
D0
MUX_IN
data A
If the command register is a command byte, any additional data bytes sent after the
command register will not be acknowledged. If the read/write bit in the address is a
logic 1, then a read operation follows and the data sent out depends on the previously
stored step.
After a valid I2C-bus write operation to the EEPROM, the part cannot be addressed via the
I2C-bus for 3.6 ms. If the part is addressed prior to this time, the part will not acknowledge
its address.
Remark: To ensure data integrity, the non-volatile register must be internally
write-protected when VDD to the I2C-bus is powered down or VDD to the component is
dropped below normal operating levels.
6.4 External control signals
The Write Protect (WP) input is used to control the ability to write the content of the
non-volatile registers. If the WP signal is logic 0, the I2C-bus will be able to write the
contents of the non-volatile registers. If the WP signal is logic 1, data will not be allowed to
be written into the non-volatile registers. In this case, the slave address and the command
code will be acknowledged, but the following data bytes will not be acknowledged and the
EEPROM is not updated.
The factory defaults for the contents of the non-volatile register are all logic 0. These
stored values can be read or written using the I2C-bus (described in Section 7
“Characteristics of the I2C-bus”).
The WP, MUX_IN_X, and MUX_SELECT signals have internal pull-up resistors. See
Table 15 “Static characteristics” and Table 16 “Dynamic characteristics” for hysteresis and
signal spike suppression figures.
PCA9561
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 6 November 2012
© NXP B.V. 2012. All rights reserved.
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