RTL8101 Ver la hoja de datos (PDF) - Unspecified
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RTL8101 Datasheet PDF : 68 Pages
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RTL8101L
15-0
RXERCNT This 16-bit counter increments by 1 for each valid packet received.
h'[0000],
It is cleared to zero by a read command.
R
5.27 CS Configuration Register
(Offset 0074h-0075h, R/W)
Bit
15
14-10
9
8
7
6
5
4
3
2
1
0
Name
Testfun
-
LD
HEART BEAT
JBEN
F_LINK_100
F_Connect
-
Con_status
Con_status_En
-
PASS_SCR
Description/Usage
1 = Auto-neg speeds up internal timer
Reserved
Active low TPI link disable signal. When low, TPI still transmits
link pulses and TPI stays in good link state.
1 = HEART BEAT enable, 0 = HEART BEAT disable. HEART
BEAT function is only valid in 10Mbps mode.
1 = enable jabber function. 0 = disable jabber function
Used to login force good link in 100Mbps for diagnostic purposes. 1
= DISABLE, 0 = ENABLE.
Assertion of this bit forces the disconnect function to be bypassed.
Reserved
This bit indicates the status of the connection. 1 = valid connected
link detected; 0 = disconnected link detected.
Assertion of this bit configures LED1 pin to indicate connection
status.
Reserved
Bypass Scramble
Default/Attribute
0,WO
-
1, RW
1, RW
1, RW
1, RW
0, RW
-
0, RO
0, RW
-
0, RW
5.28 Config5: Configuration Register 5
(Offset 00D8h, R/W)
This register, unlike other Config registers, is not protected by 93C46 Command register. I.e. there is no need to enable Config
register write prior to writing to Config5.
Bit
R/W
7
-
6
R/W
5
R/W
4
R/W
3
R/W
Symbol
-
BWF
MWF
UWF
FIFOAddrPtr
Description
Reserved
Broadcast Wakeup Frame:
1: Enable Broadcast Wakeup Frame with mask bytes of only DID
field = FF FF FF FF FF FF.
0: Default value. Disable Broadcast Wakeup Frame with mask bytes
of only DID field = FF FF FF FF FF FF.
The power-on default value of this bit is 0.
Multicast Wakeup Frame:
1: Enable Multicast Wakeup Frame with mask bytes of only DID
field, which is a multicast address.
0: Default value. Disable Multicast Wakeup Frame with mask bytes
of only DID field, which is a multicast address.
The power-on default value of this bit is 0.
Unicast Wakeup Frame:
1: Enable Unicast Wakeup Frame with mask bytes of only DID field,
which is its own physical address.
0: Default value. Disable Unicast Wakeup Frame with mask bytes of
only DID field, which is its own physical address.
The power-on default value of this bit is 0.
FIFO Address Pointer: (Realtek internal use only to test FIFO SRAM)
2003-05-28
28
Rev.1.3
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