SAA6750 Ver la hoja de datos (PDF) - Philips Electronics
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componentes Descripción
Lista de partido
SAA6750 Datasheet PDF : 60 Pages
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Philips Semiconductors
Encoder for MPEG2 image recording
(EMPIRE)
Product specification
SAA6750H
SYMBOL PIN INPUT/OUTPUT(1)
VDD
LRQN
URQN
DTACK_RDY
I_MN
120 supply
121 open-drain output
122 open-drain output
123 open-drain output
124 input
CSN
125 input
VDDCO
VSSCO
VDDCO
VSSCO
VDDCO
VSSCO
VDDCO
VSSCO
VDDCO
AS_ALE
DS_RDN
VSS
AD15
AD14
AD13
AD12
VDD
AD11
AD10
AD9
AD8
VSS
AD7
126 supply
127 ground
128 supply
129 ground
130 supply
131 ground
132 supply
133 ground
134 supply
135 input
136 input
137 ground
138 input/output
139 input/output
140 input/output
141 input/output
142 supply
143 input/output
144 input/output
145 input/output
146 input/output
147 ground
148 input/output
AD6
149 input/output
AD5
150 input/output
AD4
151 input/output
VDD
152 supply
AD3
153 input/output
AD2
154 input/output
AD1
155 input/output
AD0
156 input/output
Imax
(mA)
DESCRIPTION
− supply voltage for pad ring
3 output port lower watermark interrupt request (active LOW)
3 output port upper watermark interrupt request (active LOW)
3 output port data transfer acknowledge/ready/request
− output port reserved mode/Motorola bus style selection input
(active LOW); with internal pull-up resistor
− output port chip select for external address mode
(active LOW); with internal pull-up resistor
− supply voltage for core logic
− ground for core logic
− supply voltage for core logic
− ground for core logic
− supply voltage for core logic
− ground for core logic
− supply voltage for core logic
− ground for core logic
− supply voltage for core logic
− output port address strobe/address latch enable
− output port data strobe/read
− ground for pad ring
3 output port multiplexed address/data line bit 15 (MSB)
3 output port multiplexed address/data line bit 14
3 output port multiplexed address/data line bit 13
3 output port multiplexed address/data line bit 12
− supply voltage for pad ring
3 output port multiplexed address/data line bit 11
3 output port multiplexed address/data line bit 10
3 output port multiplexed address/data line bit 9
3 output port multiplexed address/data line bit 8
− ground for pad ring
3 output port multiplexed address/data line bit 7/data bus bit 7
(MSB)
3 output port multiplexed address/data line bit 6/data bus bit 6
3 output port multiplexed address/data line bit 5/data bus bit 5
3 output port multiplexed address/data line bit 4/data bus bit 4
− supply voltage for pad ring
3 output port multiplexed address/data line bit 3/data bus bit 3
3 output port multiplexed address/data line bit 2/data bus bit 2
3 output port multiplexed address/data line bit 1/data bus bit 1
3 output port multiplexed address/data line bit 0 (LSB)/data bus
bit 0 (LSB)
2000 May 03
10
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