SAA6750 Ver la hoja de datos (PDF) - Philips Electronics
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Lista de partido
SAA6750 Datasheet PDF : 60 Pages
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YUV7 to
YUV0
FID
HSYNC
VSYNC
VCLK
(27 MHz)
RESETN
MAD
SDA
SCL
VDD
+3.3 V
VDDCO
+3.3 V
6, 16, 28, 38, 48,
22, 24, 26, 76,
18 58, 66, 88, 94, 16 78, 80, 82,
100, 110, 120,
126, 128, 130,
142, 152, 166,
132, 134, 162,
176, 194, 204
178, 180, 182
87 to 84,
74 to 71
8
89
90
91
93
CLOCK
GENERATION
27 MHz
ADR8 to
CASN RASN WEN OEN ADR0
DATA63 to
DATA0
65
67
68
LINE
BASED
PROCESSING
69
9
64,
62 to 59, 64
57 to 54
DRAM INTERFACE
52 to 49, 47 to 44, 42 to 39, 37 to 34, 32 to 29,
20 to 17, 15 to 12, 10 to 7, 5 to 2, 208 to 205,
203 to 200, 198 to 195, 193 to 190,
188 to 185, 175 to 172, 170 to 167
101
125
124
138 to 141,
143 to 146,
148 to 151,
153 to 156
MACROBLOCK
BASED
PROCESSING
BITSTREAM
BASED
PROCESSING
DATA
OUTPUT
PORT
16
123
135
136
MEM_ST
CSN
I_MN
VSS
AD15 to AD0
DTACK_RDY
AS_ALE
DS_RDN
VDD
1.8
kΩ
121
122
VDD
1.8
kΩ
LRQN
URQN
96
SAA6750H
start
97
98
I2C-BUS
99
TRANSCEIVER
GLOBAL CONTROLLER
1, 11, 21, 33, 43, 53, 63,
18 70, 92, 95, 105, 115, 137,
147, 157, 171, 189, 199
23, 25, 27, 75, 77, 79,
16 81, 83, 127, 129, 131,
133, 177, 179, 181, 183
TEST CONTROL BLOCK FOR
BOUNDARY SCAN TEST
AND SCAN TEST
159 160 161 163 164 165
VSS
VSSCO
TRST TCK TMS TDI CS_TEST TEST
ASIP
184
n.c.
106 GPIO0
107 GPIO1
119 to 116,
114 to 111,
109, 108
10
104
103
102
158
GPIO11 to
GPIO2
VDD
1.8 kΩ
FAD_RDYN
FAD_EN
FAD_RWN
VSS
TDO
MHB661
Fig.1 Block diagram.
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