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XR16C872

Dual UART with 1284 Parallel Port and Plug-and-Play Controller

Exar Corporation 

XR16C872

Preliminary

FIFO Operation

128 byte transmit and receive data FIFOs are enabled

by the FIFO Control Register (FCR) bit-0. The standard

16C550 provides only receive FIFO of 16 bytes with 4

selectable trigger levels and there is no transmit trigger

level selection. The 872 UART provides independent

programmable trigger levels from 0 to 128 for both

receiver and transmitter. When receive or transmit

data has reached the preset trigger level the UART

generates an interrupt to call for service. The receive

FIFO section includes a time-out function to ensure

data is delivered to the CPU. A receive data time-out

interrupt is generated when there is no receive data for

a period of about 4-characters but the Receive Holding

Register (RHR) is full or data did not reach the receive

trigger level. See in the timing diagram area for TX and

RX FIFO operation.

Local UART

UARTA

Receiver FIFO Trigger

Reached

RXA

Auto RTS Trigger

Level

Transmitter

RTSA#

TXA

Hardware (RTS/CTS) Flow Control Operation

Automatic hardware or RTS and CTS flow control is

used to prevent data overrun to the local receiver FIFO

and remote receiver FIFO. The RTS# output pin is used

to request remote unit to suspend/restart data trans-

mission while the CTS# input pin is monitored to

suspend/restart local transmitter. The auto RTS and

auto CTS flow control features are individually se-

lected to fit specific application requirements and

enabled through EFR bit-6 and 7. The auto RTS

function must be started by asserting RTS# pin (MCR

bit-1=1) after it is enabled.

TXB

CTSB#

RXB

Remote UART

UARTB

Transmitter

Auto CTS

Monitor

Receiver FIFO

Trigger Reached

Auto CTS

Monitor

CTSA#

RTSB#

Auto RTS Trigger

Level

RTSA#

CTSB#

TXB

Assert RTS# to Begin Transmission

1

ON

2

7

ON

3

OFF

OFF

8

10

ON

11

ON

Starts

4

6 Suspend

Restart

9

RXA FIFO

INTA

(RXA FIFO

Interrupt)

Receive Data

5

RX FIFO Trigger

Level

RTS High

Threshold

RTS Low

Threshold

RX FIFO Trigger

12

Level

Figure 4.

Rev. P1.00

18

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