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M6MGT160S4BVP

16,777,216-BIT (1,048,576 -WORD BY 16-BIT / 2,097,152-WORD BY 8-BIT) CMOS 3.3V-ONLY FLASH MEMORY

MITSUBISHI ELECTRIC  

MITSUBISHI LSIs

M6MGB/T160S4BVP

16,777,216-BIT (1,048,576 -WORD BY 16-BIT / 2,097,152-WORD BY 8-BIT) CMOS

3.3V-ONLY FLASH MEMORY &

4,194,304-BIT (262,144WORD BY 16-BIT / 524,288-WORD BY 8-BIT) CMOS SRAM

Stacked-MCP (Multi Chip Package)

AC WAVEFORMS FOR WRITE FFH or 71H AND READ OPERATION

VIH

ADDRESSES

VIL

VIH

F-CE#

VIL

OE#

WE#

DATA

F-RP#

VIH

VIL

tRE

VIH

VIL

VOH HIGH-Z

VOL

VIH

FFH or 71H

Valid

tPS

VIL

ADDRESS VALID

tRC

ta (AD)

ta (CE)

tDF(CE)

tCLZ

ta (OE)

tOLZ

tDF(OE)

tOH

OUTPUT VALID

tPHZ

HIGH-Z

In the case of use F-CE# is Low fixed, it is allowed to define a timming specification of tRE

from rising edge of WE# to falling edge of OE#, and valid data is read after spec of tRE+ta(CE).

(This is only for FFH,71H program and read)

BYTE AC WAVEFORMS FOR READ OPERATION

ADDRESSES VIH

(A0 - A19,A-1*) VIL

VIH

F-CE#

VIL

VIH

OE#

VIL

VIH

BYTE#

VIL

VIH

DATA

(D0 - D7) VIL

HIGH-Z

ADDRESS VALID

ta(AD)

ta(CE)

ta(OE)

ta(BYTE)

tOLZ

tCLZ

tBAD

tBCD

tBAD

OUTPUT VALID

DATA

VIH

(D8 - D14) VIL

HIGH-Z

VIH

D15 / A-1

A-1

VIL

ADDRESS VALID

ta(BYTE)

VALID

tBHZ

VALID

VALID

ta(AD)

D15

A-1

tDF(CE)

tDF(OE)

tOH

When BYTE#=VIH, F-CE#=OE#=VIL , D15/A-1 is output status. At this time, input signal must not be applied.

14

Sep. 1999 , Rev.2.0

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