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SMS24

Highly Programmble Voltage Supervisory Circuit

Summit Microelectronics 

SMS24

Table 4. Device Addressing

Device Identifier Bits

Memory Address

R/W

A10 A9 A8

Read à 1

Write à 0

x

x

x

x

10

10

1 0 ß Default Memory Device

1

1

ß Alternate Memory

Device

10

0

1

ß Configuration Register

Device

2046 Table04 2.0

Byte Write

After the slave address is sent an ACKnowledge is gener-

ated and then the balance of the address is transmitted.

Upon receipt of the word address the SMS24 responds

with an ACKnowledge. After receiving the next byte of

data it again responds with an ACKnowledge. The master

then terminates the transfer by generating a STOP condi-

tion, at which time the SMS24 begins the internal write

cycle. While the internal write cycle is in progress the

SMS24 inputs are disabled and the device will not respond

to any requests from the master.

Page Write

The SMS24 is capable of a 16-byte page write operation.

It is initiated in the same manner as the byte-write opera-

tion, but instead of terminating the write cycle after the first

data word, the master can transmit up to 15 more bytes of

data. After the receipt of each byte the SMS24 will respond

with an ACKnowledge. The SMS24 automatically incre-

ments the address for subsequent data words. After the

receipt of each word the low order address bits are

internally incremented by one. The high order bits of the

address byte remain constant. Should the master transmit

more than 16 bytes, prior to generating the STOP condi-

tion, the address counter will rollover, and the previously

written data will be overwritten. As with the byte-write

operation all inputs are disabled during the internal write

cycle.

Acknowledge Polling

When the SMS24 is performing an internal WRITE opera-

tion it will ignore any new START conditions. Since the

device will only return an acknowledge after it accepts the

START, the part can be continuously queried until an

acknowledge is issued, indicating that the internal WRITE

cycle is complete. See the flow diagram for the proper

sequence of operations for polling.

Write Cycle

In Progress

Issue Start

Issue Slave

Address and

R/W = 0

Issue Stop

ACK

No

Returned

Yes

Next

Operation

a Write?

Yes

Issue

Address

No

Issue Stop

Proceed

With

Write

Await

Next

Command

2046 Flow01 1.0

Flow Diagram

READ OPERATIONS

Read operations are initiated with the R/W bit of the

identification field set to “1.” There are two different read

options: 1. Current Address Byte Read, or 2. Random

Address Byte Read

Current Address Read

The SMS24 contains an internal address counter which

maintains the address of the last word accessed, incre-

mented by one. If the last address accessed (either a read

or write) was to address location n, the next read operation

would access data from address location n+1 and incre-

10

2048 2.4. 3/1/01

SUMMIT MICROELECTRONICS, Inc.

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