ML2721 Ver la hoja de datos (PDF) - Micro Linear Corporation
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ML2721 Datasheet PDF : 27 Pages
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PRELIMINARY
CONTROL INTERFACES AND REGISTER DESCRIPTION (continued)
ML2721
REGISTER INFORMATION
A unidirectional three wire serial bus is used to set the
ML2721’s transceiver parameters and to program the PLL
circuits. Programming is performed by entering 16-bit
words into the ML2721 serial interface. Four 16-bit
registers are partitioned such that 14 bits are dedicated for
data to program the operation and 2 bits are used for
register addressing. Only three of the registers should be
used in normal operation. The purpose of each of the
registers is:
n Register 0: PLL configuration;
n Register 1: PLL tuning data;
n Register 2: Internal test access;
n Register 3: Reserved for production test only.
Table 8 shows a register map. Table 9 provides a detailed
diagram of the register organization: Table 9a and 9b
outline the PLL configuration and channel frequency
registers, and Table 9c displays the filter tuning and test
mode register.
Register 0: PLL Configuration Register
MSB
14-bit Register Data
2-bit Register Address
DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
ADR1 ADR0
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
LOL
RCXL RD0
QPP
0
0
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
16-bit Register Data
Register 1: RF Channel Frequency Register
MSB
14-bit Register Data
2-bit Register Address
DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
ADR1 ADR0
Res.
Res. CHQ11 CHQ10 CHQ9 CHQ8 CHQ7 CHQ6 CHQ5 CHQ4 CHQ3 CHQ2 CHQ1 CHQ0
0
1
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
16-bit Register Data
Register 2: Filter Tuning Select and Text Mode Access Register
MSB
14-bit Register Data
2-bit Register Address
DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
ADR1 ADR0
TMODE Res.
Res.
Res.
Res.
Res.
Res.
Res. DTM2 DTM1 DTM0 ATM2 ATM1 ATM0
1
0
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
16-bit Register Data
Register 3: Production Register (not for customer use)
MSB
14-bit Register Data
2-bit Register Address
DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
ADR1 ADR0
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
1
1
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Note: DB=Data Bit, ADR=Address Bit, Res.=Reserved.
16-bit Register Data
Table 8. Register Organization
January, 2000 PRELIMINARY DATASHEET
17
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