FEDD56V62160E-07
MD56V62160E
Bank Interleave Random Row Write Cycle @CAS Latency = 2, Burst Length = 4
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CLK
CKE
High
CS
RAS
CAS
ADDR RAa
CAa
RBb
CBb
A12,
A13
A10
RAa
RBb
RAc
CAc
RAc
DQ
DAa0 DAa1 DAa2 DAa3 DBb0 DBb1 DBb2 DBb3
DAc0 DAc1
WE
UDQM,
LDQM
Row Active
(A-Bank)
Row Active
(B-Bank)
Precharge Command
(A-Bank)
Write Command
(A-Bank)
Write Command
(A-Bank)
Write Command
(B-Bank)
Precharge Command
(B-Bank)
Row Active
(A-Bank)
Precharge Command
(A-Bank)
16/33